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Searched refs:LPTIM_CCMR1_CC2P_Pos (Results 1 – 25 of 40) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_lptim.c3612 tmpccmr1 |= sConfig->OCPolarity << LPTIM_CCMR1_CC2P_Pos; in LPTIM_OC2_SetConfig()
3683 (sConfig->ICPolarity << (LPTIM_CCMR1_CC2P_Pos - LPTIM_CCMR1_CC1P_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_lptim.c3610 tmpccmr1 |= sConfig->OCPolarity << LPTIM_CCMR1_CC2P_Pos; in LPTIM_OC2_SetConfig()
3681 (sConfig->ICPolarity << (LPTIM_CCMR1_CC2P_Pos - LPTIM_CCMR1_CC1P_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_lptim.c3582 tmpccmr1 |= sConfig->OCPolarity << LPTIM_CCMR1_CC2P_Pos; in LPTIM_OC2_SetConfig()
3653 (sConfig->ICPolarity << (LPTIM_CCMR1_CC2P_Pos - LPTIM_CCMR1_CC1P_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_lptim.c3642 tmpccmr1 |= sConfig->OCPolarity << LPTIM_CCMR1_CC2P_Pos; in LPTIM_OC2_SetConfig()
3713 (sConfig->ICPolarity << (LPTIM_CCMR1_CC2P_Pos - LPTIM_CCMR1_CC1P_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_lptim.c3642 tmpccmr1 |= sConfig->OCPolarity << LPTIM_CCMR1_CC2P_Pos; in LPTIM_OC2_SetConfig()
3713 (sConfig->ICPolarity << (LPTIM_CCMR1_CC2P_Pos - LPTIM_CCMR1_CC1P_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_lptim.c4036 tmpccmr1 |= sConfig->OCPolarity << LPTIM_CCMR1_CC2P_Pos; in LPTIM_OC2_SetConfig()
4187 (sConfig->ICPolarity << (LPTIM_CCMR1_CC2P_Pos - LPTIM_CCMR1_CC1P_Pos)) | in LPTIM_IC2_SetConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h4924 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
4925 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000…
4927 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000…
4928 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000…
Dstm32wba52xx.h8525 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
8526 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000…
8528 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000…
8529 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000…
Dstm32wba54xx.h8759 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
8760 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000…
8762 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000…
8763 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000…
Dstm32wba5mxx.h8759 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
8760 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000…
8762 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000…
8763 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000…
Dstm32wba55xx.h8759 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
8760 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000…
8762 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000…
8763 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000…
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h8300 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
8301 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000 */
8303 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000 */
8304 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000 */
Dstm32u083xx.h9237 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
9238 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000 */
9240 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000 */
9241 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000 */
Dstm32u073xx.h8967 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
8968 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000 */
8970 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000 */
8971 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000 */
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h7839 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
7840 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000…
7842 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000…
7843 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000…
Dstm32h523xx.h10278 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
10279 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000…
10281 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000…
10282 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000…
Dstm32h562xx.h11004 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
11005 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000…
11007 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000…
11008 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000…
Dstm32h533xx.h10687 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
10688 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000…
10690 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000…
10691 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000…
Dstm32h573xx.h13497 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
13498 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000…
13500 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000…
13501 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000…
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h11370 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
11371 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000…
11373 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000…
11374 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000…
Dstm32u535xx.h10970 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
10971 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000…
10973 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000…
10974 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000…
Dstm32u575xx.h12005 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
12006 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000…
12008 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000…
12009 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000…
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h12773 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
12774 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000 */
12776 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000 */
12777 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000 */
Dstm32h7s7xx.h13362 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
13363 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000 */
13365 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000 */
13366 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000 */
Dstm32h7s3xx.h13218 #define LPTIM_CCMR1_CC2P_Pos (18U) macro
13219 #define LPTIM_CCMR1_CC2P_Msk (0x3UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x000C0000 */
13221 #define LPTIM_CCMR1_CC2P_0 (0x1UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00040000 */
13222 #define LPTIM_CCMR1_CC2P_1 (0x2UL << LPTIM_CCMR1_CC2P_Pos) /*!< 0x00080000 */

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