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Searched refs:LL_TIM_WriteReg (Results 1 – 25 of 48) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_ll_tim.c374 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
594 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
597 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
694 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
697 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
700 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
703 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
791 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
872 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
875 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_ll_tim.c327 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
547 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
550 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
647 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
650 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
653 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
656 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
750 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
831 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
834 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_ll_tim.c306 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
526 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
529 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
626 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
629 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
632 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
635 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
730 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
811 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
814 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_ll_tim.c323 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
543 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
546 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
643 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
646 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
649 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
652 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
746 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
827 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
830 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_ll_tim.c318 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
538 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
541 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
638 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
641 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
644 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
647 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
741 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
822 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
825 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_ll_tim.c310 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
530 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
533 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
630 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
633 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
636 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
639 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
733 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
814 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
817 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_ll_tim.c341 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
561 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
564 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
661 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
664 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
667 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
670 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
764 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
845 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
848 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_ll_tim.c347 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
567 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
570 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
667 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
670 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
673 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
676 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
764 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
845 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
848 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_ll_tim.c350 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
570 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
573 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
670 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
673 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
676 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
679 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
773 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
854 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
857 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_ll_tim.c328 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
540 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
543 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
640 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
643 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
646 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
649 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
716 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
797 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
800 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_ll_tim.c328 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
540 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
543 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
640 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
643 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
646 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
649 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
716 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
797 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
800 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_ll_tim.c307 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
519 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
522 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
619 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
622 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
625 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
628 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
695 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
776 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
779 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_ll_tim.c364 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
584 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
587 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
684 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
687 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
690 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
693 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
787 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
868 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
871 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_ll_tim.c418 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
643 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
646 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
744 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
747 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
750 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
753 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
852 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
933 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
936 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_tim.c360 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
580 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
583 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
680 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
683 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
686 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
689 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
783 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
864 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
867 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_ll_tim.c383 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
597 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
600 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
695 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
698 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
701 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
704 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
800 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
881 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
884 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_ll_tim.c401 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
621 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
624 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
721 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
724 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
727 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
730 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
824 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
905 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
908 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_ll_tim.c386 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
606 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
609 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
706 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
709 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
712 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
715 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
821 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
902 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
905 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_ll_tim.c358 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
578 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
581 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
678 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
681 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
684 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
687 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
781 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
862 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
865 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_ll_tim.c395 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
615 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
618 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
715 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
718 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
721 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
724 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
818 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
899 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
902 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_ll_tim.c348 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
560 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
563 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
658 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in LL_TIM_HALLSENSOR_Init()
661 LL_TIM_WriteReg(TIMx, SMCR, tmpsmcr); in LL_TIM_HALLSENSOR_Init()
664 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_HALLSENSOR_Init()
667 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_HALLSENSOR_Init()
734 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
815 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
818 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
[all …]
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/src/
Dstm32wb0x_ll_tim.c317 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
545 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
548 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
653 LL_TIM_WriteReg(TIMx, BDTR, tmpbdtr); in LL_TIM_BDTR_Init()
734 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
737 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
743 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in OC1Config()
815 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC2Config()
818 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC2Config()
824 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in OC2Config()
[all …]
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_ll_tim.c246 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
447 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
450 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
512 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
515 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
521 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in OC1Config()
571 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC2Config()
574 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC2Config()
580 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in OC2Config()
630 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC3Config()
[all …]
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_ll_tim.c269 LL_TIM_WriteReg(TIMx, CR1, tmpcr1); in LL_TIM_Init()
470 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in LL_TIM_ENCODER_Init()
473 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in LL_TIM_ENCODER_Init()
535 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC1Config()
538 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC1Config()
544 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in OC1Config()
594 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC2Config()
597 LL_TIM_WriteReg(TIMx, CCMR1, tmpccmr1); in OC2Config()
603 LL_TIM_WriteReg(TIMx, CCER, tmpccer); in OC2Config()
653 LL_TIM_WriteReg(TIMx, CR2, tmpcr2); in OC3Config()
[all …]
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_tim.h808 #define LL_TIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VAL… macro

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