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Searched refs:IFCR (Results 1 – 25 of 351) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_ll_dma.h1532 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
1543 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
1554 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
1565 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
1576 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
1587 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6); in LL_DMA_ClearFlag_GI6()
1598 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7); in LL_DMA_ClearFlag_GI7()
1609 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF8); in LL_DMA_ClearFlag_GI8()
1620 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
1631 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
[all …]
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_dma.h1439 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
1450 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
1461 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
1472 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
1483 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
1494 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6); in LL_DMA_ClearFlag_GI6()
1505 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7); in LL_DMA_ClearFlag_GI7()
1516 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
1527 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
1538 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
[all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_bdma.h1873 WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF0); in LL_BDMA_ClearFlag_GI0()
1888 WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF1); in LL_BDMA_ClearFlag_GI1()
1903 WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF2); in LL_BDMA_ClearFlag_GI2()
1918 WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF3); in LL_BDMA_ClearFlag_GI3()
1933 WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF4); in LL_BDMA_ClearFlag_GI4()
1948 WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF5); in LL_BDMA_ClearFlag_GI5()
1963 WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF6); in LL_BDMA_ClearFlag_GI6()
1978 WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CGIF7); in LL_BDMA_ClearFlag_GI7()
1989 WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTCIF0); in LL_BDMA_ClearFlag_TC0()
2000 WRITE_REG(BDMAx->IFCR, BDMA_IFCR_CTCIF1); in LL_BDMA_ClearFlag_TC1()
[all …]
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_dma.h2309 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
2320 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
2331 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
2342 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
2353 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
2364 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6); in LL_DMA_ClearFlag_GI6()
2375 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7); in LL_DMA_ClearFlag_GI7()
2386 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF8); in LL_DMA_ClearFlag_GI8()
2397 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
2408 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
[all …]
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_dma.h1945 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
1960 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
1975 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
1990 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
2005 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
2020 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6); in LL_DMA_ClearFlag_GI6()
2036 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7); in LL_DMA_ClearFlag_GI7()
2053 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF8); in LL_DMA_ClearFlag_GI8()
2065 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
2076 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
[all …]
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_dma.h1595 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
1606 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
1617 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
1628 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
1639 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
1651 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6); in LL_DMA_ClearFlag_GI6()
1664 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7); in LL_DMA_ClearFlag_GI7()
1676 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
1687 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
1698 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
[all …]
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_dma.h1619 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
1634 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
1649 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
1664 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
1679 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
1694 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6); in LL_DMA_ClearFlag_GI6()
1709 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7); in LL_DMA_ClearFlag_GI7()
1720 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
1731 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
1742 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
[all …]
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_dma.h1713 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
1728 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
1743 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
1758 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
1773 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
1788 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6); in LL_DMA_ClearFlag_GI6()
1803 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7); in LL_DMA_ClearFlag_GI7()
1814 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
1825 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
1836 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
[all …]
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_dma.h1704 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
1719 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
1734 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
1749 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
1764 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
1780 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6); in LL_DMA_ClearFlag_GI6()
1797 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7); in LL_DMA_ClearFlag_GI7()
1809 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
1820 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
1831 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
[all …]
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_dma.h1476 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
1487 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
1498 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
1509 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
1520 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
1531 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6); in LL_DMA_ClearFlag_GI6()
1542 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7); in LL_DMA_ClearFlag_GI7()
1553 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
1564 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
1575 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
[all …]
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_dma.h1477 SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
1488 SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
1499 SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
1510 SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
1521 SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
1532 SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF6); in LL_DMA_ClearFlag_GI6()
1543 SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF7); in LL_DMA_ClearFlag_GI7()
1554 SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
1565 SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
1576 SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
[all …]
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_dma.h1963 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
1974 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
1985 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
1996 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
2007 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
2018 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6); in LL_DMA_ClearFlag_GI6()
2029 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7); in LL_DMA_ClearFlag_GI7()
2040 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
2051 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
2062 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
[all …]
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_dma.h1676 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
1691 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
1706 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
1721 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
1736 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
1752 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6); in LL_DMA_ClearFlag_GI6()
1769 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7); in LL_DMA_ClearFlag_GI7()
1781 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
1792 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
1803 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
[all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_dma.h1881 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
1896 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
1911 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
1926 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
1941 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
1956 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF6); in LL_DMA_ClearFlag_GI6()
1971 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF7); in LL_DMA_ClearFlag_GI7()
1982 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
1993 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
2004 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
[all …]
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_dma.h1485 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF1); in LL_DMA_ClearFlag_GI1()
1500 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF2); in LL_DMA_ClearFlag_GI2()
1515 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF3); in LL_DMA_ClearFlag_GI3()
1531 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF4); in LL_DMA_ClearFlag_GI4()
1548 WRITE_REG(DMAx->IFCR, DMA_IFCR_CGIF5); in LL_DMA_ClearFlag_GI5()
1560 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF1); in LL_DMA_ClearFlag_TC1()
1571 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF2); in LL_DMA_ClearFlag_TC2()
1582 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF3); in LL_DMA_ClearFlag_TC3()
1594 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF4); in LL_DMA_ClearFlag_TC4()
1607 WRITE_REG(DMAx->IFCR, DMA_IFCR_CTCIF5); in LL_DMA_ClearFlag_TC5()
[all …]
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_hal_dma.c117 __IO uint32_t IFCR; /*!< DMA interrupt flag clear register */ member
295 regs->IFCR = 0x3FU << hdma->StreamIndex; in HAL_DMA_Init()
365 regs->IFCR = 0x3FU << hdma->StreamIndex; in HAL_DMA_DeInit()
479 regs->IFCR = 0x3FU << hdma->StreamIndex; in HAL_DMA_Start_IT()
566 regs->IFCR = 0x3FU << hdma->StreamIndex; in HAL_DMA_Abort()
682 regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex; in HAL_DMA_PollForTransfer()
691 regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex; in HAL_DMA_PollForTransfer()
700 regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex; in HAL_DMA_PollForTransfer()
711 regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex; in HAL_DMA_PollForTransfer()
727 regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex; in HAL_DMA_PollForTransfer()
[all …]
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_dma.c116 __IO uint32_t IFCR; /*!< DMA interrupt flag clear register */ member
294 regs->IFCR = 0x3FU << hdma->StreamIndex; in HAL_DMA_Init()
356 regs->IFCR = 0x3FU << hdma->StreamIndex; in HAL_DMA_DeInit()
478 regs->IFCR = 0x3FU << hdma->StreamIndex; in HAL_DMA_Start_IT()
566 regs->IFCR = 0x3FU << hdma->StreamIndex; in HAL_DMA_Abort()
683 regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex; in HAL_DMA_PollForTransfer()
692 regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex; in HAL_DMA_PollForTransfer()
701 regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex; in HAL_DMA_PollForTransfer()
712 regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex; in HAL_DMA_PollForTransfer()
728 regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex; in HAL_DMA_PollForTransfer()
[all …]
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_dma.c115 __IO uint32_t IFCR; /*!< DMA interrupt flag clear register */ member
292 regs->IFCR = 0x3FU << hdma->StreamIndex; in HAL_DMA_Init()
362 regs->IFCR = 0x3FU << hdma->StreamIndex; in HAL_DMA_DeInit()
476 regs->IFCR = 0x3FU << hdma->StreamIndex; in HAL_DMA_Start_IT()
563 regs->IFCR = 0x3FU << hdma->StreamIndex; in HAL_DMA_Abort()
679 regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex; in HAL_DMA_PollForTransfer()
688 regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex; in HAL_DMA_PollForTransfer()
697 regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex; in HAL_DMA_PollForTransfer()
708 regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex; in HAL_DMA_PollForTransfer()
724 regs->IFCR = (DMA_FLAG_HTIF0_4 | DMA_FLAG_TCIF0_4) << hdma->StreamIndex; in HAL_DMA_PollForTransfer()
[all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_dma.c116 __IO uint32_t IFCR; /*!< DMA interrupt flag clear register */ member
122 __IO uint32_t IFCR; /*!< BDMA interrupt flag clear register */ member
356 regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU); in HAL_DMA_Init()
401 regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU)); in HAL_DMA_Init()
506 regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU); in HAL_DMA_DeInit()
529 regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU)); in HAL_DMA_DeInit()
857 regs_dma->IFCR = 0x3FUL << (hdma->StreamIndex & 0x1FU); in HAL_DMA_Abort()
862 regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU)); in HAL_DMA_Abort()
937 regs_bdma->IFCR = ((BDMA_IFCR_CGIF0) << (hdma->StreamIndex & 0x1FU)); in HAL_DMA_Abort_IT()
1029 ifcr_reg = &(((DMA_Base_Registers *)hdma->StreamBaseAddress)->IFCR); in HAL_DMA_PollForTransfer()
[all …]
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_hal_dma.c239 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_DeInit()
416 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Abort()
454 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Abort_IT()
521 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_PollForTransfer()
556 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex& 0x1cU)); in HAL_DMA_PollForTransfer()
565 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_PollForTransfer()
595 hdma->DmaBaseAddress->IFCR = DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1cU); in HAL_DMA_IRQHandler()
619 hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_IRQHandler()
640 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_IRQHandler()
844 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU)); in DMA_SetConfig()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_hal_dma.c229 hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; in HAL_DMA_DeInit()
405 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); in HAL_DMA_Abort()
443 hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; in HAL_DMA_Abort_IT()
510 hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; in HAL_DMA_PollForTransfer()
545 hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; in HAL_DMA_PollForTransfer()
554 hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; in HAL_DMA_PollForTransfer()
585 hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; in HAL_DMA_IRQHandler()
611 hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; in HAL_DMA_IRQHandler()
632 hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; in HAL_DMA_IRQHandler()
828 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); in DMA_SetConfig()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_hal_dma.c228 hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; in HAL_DMA_DeInit()
410 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); in HAL_DMA_Abort()
447 hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; in HAL_DMA_Abort_IT()
514 hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; in HAL_DMA_PollForTransfer()
549 hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; in HAL_DMA_PollForTransfer()
558 hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; in HAL_DMA_PollForTransfer()
589 hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; in HAL_DMA_IRQHandler()
615 hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; in HAL_DMA_IRQHandler()
636 hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; in HAL_DMA_IRQHandler()
832 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); in DMA_SetConfig()
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/src/
Dstm32wb0x_hal_dma.c246 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x3cU)); in HAL_DMA_DeInit()
430 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x3cU)); in HAL_DMA_Abort()
468 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x3cU)); in HAL_DMA_Abort_IT()
535 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x3cU)); in HAL_DMA_PollForTransfer()
570 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x3cU)); in HAL_DMA_PollForTransfer()
579 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x3cU)); in HAL_DMA_PollForTransfer()
609 hdma->DmaBaseAddress->IFCR = (DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x3cU)); in HAL_DMA_IRQHandler()
633 hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x3cU)); in HAL_DMA_IRQHandler()
654 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x3cU)); in HAL_DMA_IRQHandler()
858 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x3cU)); in DMA_SetConfig()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_hal_dma.c263 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_DeInit()
436 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_Abort()
474 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_Abort_IT()
541 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_PollForTransfer()
576 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex& 0x1CU)); in HAL_DMA_PollForTransfer()
585 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_PollForTransfer()
615 hdma->DmaBaseAddress->IFCR = DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1CU); in HAL_DMA_IRQHandler()
642 hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_IRQHandler()
663 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_IRQHandler()
867 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in DMA_SetConfig()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_dma.c328 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_DeInit()
575 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_Abort()
633 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_Abort_IT()
650 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_Abort_IT()
718 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_PollForTransfer()
782 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_PollForTransfer()
794 hdma->DmaBaseAddress->IFCR = (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_PollForTransfer()
821 hdma->DmaBaseAddress->IFCR = DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1CU); in HAL_DMA_IRQHandler()
847 hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_IRQHandler()
868 hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1CU)); in HAL_DMA_IRQHandler()
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