Home
last modified time | relevance | path

Searched refs:DMA_CCR_HTIE (Results 1 – 25 of 227) sorted by relevance

12345678910

/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_dma.h232 #define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */
1771 …IT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel - 1U]))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
1828 …IT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel - 1U]))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
1887 DMA_CCR_HTIE) == (DMA_CCR_HTIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_HT()
Dstm32c0xx_hal_dma.h302 #define DMA_IT_HT DMA_CCR_HTIE
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_ll_dma.h235 #define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */
1920 SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
1980 CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
2042 DMA_CCR_HTIE) == (DMA_CCR_HTIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_HT()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_dma.h223 #define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */
1782 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
1839 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
1898 DMA_CCR_HTIE) == (DMA_CCR_HTIE)); in LL_DMA_IsEnabledIT_HT()
Dstm32f1xx_hal_dma.h233 #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE)
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_dma.h254 #define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */
1953 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
2010 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
2069 DMA_CCR_HTIE) == (DMA_CCR_HTIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_HT()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_dma.h240 #define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */
1985 SET_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
2042 CLEAR_BIT(__LL_DMA_INSTANCE_TO_CHANNEL(DMAx, Channel - 1U)->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
2101 DMA_CCR_HTIE) == (DMA_CCR_HTIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_HT()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_dma.h246 #define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */
2081 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
2141 …EAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
2203 DMA_CCR_HTIE) == (DMA_CCR_HTIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_HT()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_dma.h249 #define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */
2088 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
2148 …EAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
2210 DMA_CCR_HTIE) == (DMA_CCR_HTIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_HT()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_dma.h224 #define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */
1818 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
1875 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
1934 DMA_CCR_HTIE) == (DMA_CCR_HTIE)); in LL_DMA_IsEnabledIT_HT()
Dstm32f3xx_hal_dma.h231 #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE)
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_dma.h225 #define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */
1819 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
1876 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
1935 DMA_CCR_HTIE) == (DMA_CCR_HTIE)); in LL_DMA_IsEnabledIT_HT()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_dma.h237 #define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */
2307 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
2367 …EAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
2429 DMA_CCR_HTIE) == (DMA_CCR_HTIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_HT()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_dma.h255 #define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */
2058 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
2115 …nel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
2174 DMA_CCR_HTIE) == (DMA_CCR_HTIE)); in LL_DMA_IsEnabledIT_HT()
Dstm32f0xx_hal_dma.h233 #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE)
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_dma.h272 #define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */
2249 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
2309 …EAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
2371 DMA_CCR_HTIE) == (DMA_CCR_HTIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_HT()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_dma.h239 #define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */
2699 …SET_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
2762 …EAR_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
2827 DMA_CCR_HTIE) == (DMA_CCR_HTIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_HT()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_dma.h265 #define LL_DMA_CCR_HTIE DMA_CCR_HTIE /*!< Half Transfer interrupt */
2381 …A_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
2447 …A_Channel_TypeDef *)((uint32_t)(dma_base_addr + CHANNEL_OFFSET_TAB[Channel])))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
2515 DMA_CCR_HTIE) == (DMA_CCR_HTIE)) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_HT()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_dma.h4174 …T_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
4328 …R_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
4487 …AD_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE) in LL_DMA_IsEnabledIT_HT()
4488 == DMA_CCR_HTIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_HT()
Dstm32wbaxx_hal_dma.h223 #define DMA_IT_HT DMA_CCR_HTIE /*!< Half transfer complete interrupt */
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_dma.h5959 …T_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
6113 …R_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
6272 …AD_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE) in LL_DMA_IsEnabledIT_HT()
6273 == DMA_CCR_HTIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_HT()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma.h6472 …T_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
6682 …R_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
6897 …AD_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE) in LL_DMA_IsEnabledIT_HT()
6898 == DMA_CCR_HTIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_HT()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma.h6171 …T_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
6381 …R_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
6596 …AD_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE) in LL_DMA_IsEnabledIT_HT()
6597 == DMA_CCR_HTIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_HT()
Dstm32h7rsxx_hal_dma.h223 #define DMA_IT_HT DMA_CCR_HTIE /*!< Half transfer complete interrupt */
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_dma.h7609 …T_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_EnableIT_HT()
7819 …R_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE); in LL_DMA_DisableIT_HT()
8034 …AD_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_HTIE) in LL_DMA_IsEnabledIT_HT()
8035 == DMA_CCR_HTIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_HT()

12345678910