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Searched refs:DMA2D_CR_TWIE (Results 1 – 25 of 79) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_dma2d.h362 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
1698 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); in LL_DMA2D_EnableIT_TW()
1764 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); in LL_DMA2D_DisableIT_TW()
1830 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_TW()
Dstm32f4xx_hal_dma2d.h261 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_dma2d.h402 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
2027 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); in LL_DMA2D_EnableIT_TW()
2093 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); in LL_DMA2D_DisableIT_TW()
2159 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_TW()
Dstm32h7xx_hal_dma2d.h324 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_dma2d.h390 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
1914 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); in LL_DMA2D_EnableIT_TW()
1980 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); in LL_DMA2D_DisableIT_TW()
2046 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_TW()
Dstm32f7xx_hal_dma2d.h297 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma2d.h402 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
2027 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); in LL_DMA2D_EnableIT_TW()
2093 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); in LL_DMA2D_DisableIT_TW()
2159 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_TW()
Dstm32h7rsxx_hal_dma2d.h324 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_dma2d.h403 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
2012 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); in LL_DMA2D_EnableIT_TW()
2078 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); in LL_DMA2D_DisableIT_TW()
2144 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_TW()
Dstm32l4xx_hal_dma2d.h323 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_dma2d.h402 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
2027 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); in LL_DMA2D_EnableIT_TW()
2093 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); in LL_DMA2D_DisableIT_TW()
2159 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_TW()
Dstm32n6xx_hal_dma2d.h324 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma2d.h404 #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
2035 SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); in LL_DMA2D_EnableIT_TW()
2101 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); in LL_DMA2D_DisableIT_TW()
2167 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_TW()
Dstm32u5xx_hal_dma2d.h330 #define DMA2D_IT_TW DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f427xx.h6309 #define DMA2D_CR_TWIE DMA2D_CR_TWIE_Msk /*!< Transfer Waterm… macro
Dstm32f429xx.h6368 #define DMA2D_CR_TWIE DMA2D_CR_TWIE_Msk /*!< Transfer Waterm… macro
Dstm32f439xx.h6555 #define DMA2D_CR_TWIE DMA2D_CR_TWIE_Msk /*!< Transfer Waterm… macro
Dstm32f437xx.h6501 #define DMA2D_CR_TWIE DMA2D_CR_TWIE_Msk /*!< Transfer Waterm… macro
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f750xx.h6643 #define DMA2D_CR_TWIE DMA2D_CR_TWIE_Msk /*!< Transfer Waterm… macro
Dstm32f745xx.h6400 #define DMA2D_CR_TWIE DMA2D_CR_TWIE_Msk /*!< Transfer Waterm… macro
Dstm32f756xx.h6643 #define DMA2D_CR_TWIE DMA2D_CR_TWIE_Msk /*!< Transfer Waterm… macro
Dstm32f746xx.h6455 #define DMA2D_CR_TWIE DMA2D_CR_TWIE_Msk /*!< Transfer Waterm… macro
Dstm32f765xx.h6860 #define DMA2D_CR_TWIE DMA2D_CR_TWIE_Msk /*!< Transfer Waterm… macro
Dstm32f777xx.h7142 #define DMA2D_CR_TWIE DMA2D_CR_TWIE_Msk /*!< Transfer Waterm… macro
Dstm32f767xx.h6954 #define DMA2D_CR_TWIE DMA2D_CR_TWIE_Msk /*!< Transfer Waterm… macro

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