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Searched refs:DMA2D_CR_CAEIE (Results 1 – 25 of 79) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_dma2d.h361 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
1687 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); in LL_DMA2D_EnableIT_CAE()
1753 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); in LL_DMA2D_DisableIT_CAE()
1819 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_CAE()
Dstm32f4xx_hal_dma2d.h260 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_dma2d.h401 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
2016 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); in LL_DMA2D_EnableIT_CAE()
2082 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); in LL_DMA2D_DisableIT_CAE()
2148 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_CAE()
Dstm32h7xx_hal_dma2d.h323 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_dma2d.h389 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
1903 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); in LL_DMA2D_EnableIT_CAE()
1969 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); in LL_DMA2D_DisableIT_CAE()
2035 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_CAE()
Dstm32f7xx_hal_dma2d.h296 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma2d.h401 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
2016 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); in LL_DMA2D_EnableIT_CAE()
2082 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); in LL_DMA2D_DisableIT_CAE()
2148 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_CAE()
Dstm32h7rsxx_hal_dma2d.h323 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_dma2d.h402 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
2001 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); in LL_DMA2D_EnableIT_CAE()
2067 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); in LL_DMA2D_DisableIT_CAE()
2133 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_CAE()
Dstm32l4xx_hal_dma2d.h322 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_dma2d.h401 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
2016 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); in LL_DMA2D_EnableIT_CAE()
2082 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); in LL_DMA2D_DisableIT_CAE()
2148 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_CAE()
Dstm32n6xx_hal_dma2d.h323 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma2d.h403 #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
2024 SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); in LL_DMA2D_EnableIT_CAE()
2090 CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); in LL_DMA2D_DisableIT_CAE()
2156 return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL); in LL_DMA2D_IsEnabledIT_CAE()
Dstm32u5xx_hal_dma2d.h329 #define DMA2D_IT_CAE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f427xx.h6312 #define DMA2D_CR_CAEIE DMA2D_CR_CAEIE_Msk /*!< CLUT Access Err… macro
Dstm32f429xx.h6371 #define DMA2D_CR_CAEIE DMA2D_CR_CAEIE_Msk /*!< CLUT Access Err… macro
Dstm32f439xx.h6558 #define DMA2D_CR_CAEIE DMA2D_CR_CAEIE_Msk /*!< CLUT Access Err… macro
Dstm32f437xx.h6504 #define DMA2D_CR_CAEIE DMA2D_CR_CAEIE_Msk /*!< CLUT Access Err… macro
/hal_stm32-latest/stm32cube/stm32f7xx/soc/
Dstm32f750xx.h6646 #define DMA2D_CR_CAEIE DMA2D_CR_CAEIE_Msk /*!< CLUT Access Err… macro
Dstm32f745xx.h6403 #define DMA2D_CR_CAEIE DMA2D_CR_CAEIE_Msk /*!< CLUT Access Err… macro
Dstm32f756xx.h6646 #define DMA2D_CR_CAEIE DMA2D_CR_CAEIE_Msk /*!< CLUT Access Err… macro
Dstm32f746xx.h6458 #define DMA2D_CR_CAEIE DMA2D_CR_CAEIE_Msk /*!< CLUT Access Err… macro
Dstm32f765xx.h6863 #define DMA2D_CR_CAEIE DMA2D_CR_CAEIE_Msk /*!< CLUT Access Err… macro
Dstm32f777xx.h7145 #define DMA2D_CR_CAEIE DMA2D_CR_CAEIE_Msk /*!< CLUT Access Err… macro
Dstm32f767xx.h6957 #define DMA2D_CR_CAEIE DMA2D_CR_CAEIE_Msk /*!< CLUT Access Err… macro

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