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Searched refs:ADC_SQR5_SQ6_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h1391 #define ADC_SQR5_SQ6_Pos (25U) macro
1392 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1394 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1395 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1396 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1397 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1398 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l152xba.h1376 #define ADC_SQR5_SQ6_Pos (25U) macro
1377 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1379 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1380 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1381 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1382 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1383 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l100xba.h1373 #define ADC_SQR5_SQ6_Pos (25U) macro
1374 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1376 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1377 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1378 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1379 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1380 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l100xb.h1373 #define ADC_SQR5_SQ6_Pos (25U) macro
1374 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1376 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1377 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1378 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1379 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1380 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l151xb.h1374 #define ADC_SQR5_SQ6_Pos (25U) macro
1375 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1377 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1378 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1379 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1380 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1381 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l151xba.h1374 #define ADC_SQR5_SQ6_Pos (25U) macro
1375 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1377 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1378 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1379 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1380 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1381 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l100xc.h1427 #define ADC_SQR5_SQ6_Pos (25U) macro
1428 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1430 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1431 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1432 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1433 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1434 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l151xc.h1485 #define ADC_SQR5_SQ6_Pos (25U) macro
1486 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1488 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1489 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1490 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1491 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1492 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l151xca.h1489 #define ADC_SQR5_SQ6_Pos (25U) macro
1490 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1492 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1493 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1494 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1495 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1496 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l151xdx.h1506 #define ADC_SQR5_SQ6_Pos (25U) macro
1507 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1509 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1510 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1511 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1512 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1513 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l151xe.h1506 #define ADC_SQR5_SQ6_Pos (25U) macro
1507 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1509 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1510 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1511 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1512 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1513 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l152xc.h1481 #define ADC_SQR5_SQ6_Pos (25U) macro
1482 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1484 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1485 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1486 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1487 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1488 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l152xca.h1506 #define ADC_SQR5_SQ6_Pos (25U) macro
1507 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1509 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1510 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1511 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1512 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1513 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l152xdx.h1523 #define ADC_SQR5_SQ6_Pos (25U) macro
1524 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1526 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1527 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1528 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1529 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1530 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l152xe.h1523 #define ADC_SQR5_SQ6_Pos (25U) macro
1524 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1526 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1527 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1528 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1529 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1530 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l162xc.h1504 #define ADC_SQR5_SQ6_Pos (25U) macro
1505 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1507 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1508 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1509 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1510 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1511 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l162xca.h1529 #define ADC_SQR5_SQ6_Pos (25U) macro
1530 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1532 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1533 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1534 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1535 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1536 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l162xdx.h1546 #define ADC_SQR5_SQ6_Pos (25U) macro
1547 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1549 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1550 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1551 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1552 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1553 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l162xe.h1546 #define ADC_SQR5_SQ6_Pos (25U) macro
1547 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1549 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1550 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1551 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1552 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1553 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l151xd.h1563 #define ADC_SQR5_SQ6_Pos (25U) macro
1564 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1566 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1567 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1568 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1569 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1570 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l152xd.h1580 #define ADC_SQR5_SQ6_Pos (25U) macro
1581 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1583 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1584 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1585 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1586 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1587 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */
Dstm32l162xd.h1603 #define ADC_SQR5_SQ6_Pos (25U) macro
1604 #define ADC_SQR5_SQ6_Msk (0x1FUL << ADC_SQR5_SQ6_Pos) /*!< 0x3E000000 */
1606 #define ADC_SQR5_SQ6_0 (0x01UL << ADC_SQR5_SQ6_Pos) /*!< 0x02000000 */
1607 #define ADC_SQR5_SQ6_1 (0x02UL << ADC_SQR5_SQ6_Pos) /*!< 0x04000000 */
1608 #define ADC_SQR5_SQ6_2 (0x04UL << ADC_SQR5_SQ6_Pos) /*!< 0x08000000 */
1609 #define ADC_SQR5_SQ6_3 (0x08UL << ADC_SQR5_SQ6_Pos) /*!< 0x10000000 */
1610 #define ADC_SQR5_SQ6_4 (0x10UL << ADC_SQR5_SQ6_Pos) /*!< 0x20000000 */