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Searched refs:ADC_SQR5_SQ5_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h1382 #define ADC_SQR5_SQ5_Pos (20U) macro
1383 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1385 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1386 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1387 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1388 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1389 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l152xba.h1367 #define ADC_SQR5_SQ5_Pos (20U) macro
1368 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1370 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1371 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1372 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1373 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1374 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l100xba.h1364 #define ADC_SQR5_SQ5_Pos (20U) macro
1365 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1367 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1368 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1369 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1370 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1371 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l100xb.h1364 #define ADC_SQR5_SQ5_Pos (20U) macro
1365 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1367 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1368 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1369 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1370 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1371 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l151xb.h1365 #define ADC_SQR5_SQ5_Pos (20U) macro
1366 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1368 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1369 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1370 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1371 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1372 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l151xba.h1365 #define ADC_SQR5_SQ5_Pos (20U) macro
1366 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1368 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1369 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1370 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1371 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1372 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l100xc.h1418 #define ADC_SQR5_SQ5_Pos (20U) macro
1419 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1421 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1422 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1423 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1424 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1425 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l151xc.h1476 #define ADC_SQR5_SQ5_Pos (20U) macro
1477 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1479 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1480 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1481 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1482 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1483 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l151xca.h1480 #define ADC_SQR5_SQ5_Pos (20U) macro
1481 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1483 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1484 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1485 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1486 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1487 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l151xdx.h1497 #define ADC_SQR5_SQ5_Pos (20U) macro
1498 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1500 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1501 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1502 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1503 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1504 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l151xe.h1497 #define ADC_SQR5_SQ5_Pos (20U) macro
1498 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1500 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1501 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1502 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1503 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1504 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l152xc.h1472 #define ADC_SQR5_SQ5_Pos (20U) macro
1473 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1475 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1476 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1477 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1478 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1479 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l152xca.h1497 #define ADC_SQR5_SQ5_Pos (20U) macro
1498 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1500 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1501 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1502 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1503 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1504 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l152xdx.h1514 #define ADC_SQR5_SQ5_Pos (20U) macro
1515 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1517 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1518 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1519 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1520 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1521 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l152xe.h1514 #define ADC_SQR5_SQ5_Pos (20U) macro
1515 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1517 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1518 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1519 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1520 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1521 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l162xc.h1495 #define ADC_SQR5_SQ5_Pos (20U) macro
1496 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1498 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1499 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1500 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1501 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1502 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l162xca.h1520 #define ADC_SQR5_SQ5_Pos (20U) macro
1521 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1523 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1524 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1525 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1526 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1527 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l162xdx.h1537 #define ADC_SQR5_SQ5_Pos (20U) macro
1538 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1540 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1541 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1542 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1543 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1544 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l162xe.h1537 #define ADC_SQR5_SQ5_Pos (20U) macro
1538 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1540 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1541 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1542 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1543 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1544 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l151xd.h1554 #define ADC_SQR5_SQ5_Pos (20U) macro
1555 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1557 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1558 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1559 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1560 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1561 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l152xd.h1571 #define ADC_SQR5_SQ5_Pos (20U) macro
1572 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1574 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1575 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1576 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1577 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1578 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */
Dstm32l162xd.h1594 #define ADC_SQR5_SQ5_Pos (20U) macro
1595 #define ADC_SQR5_SQ5_Msk (0x1FUL << ADC_SQR5_SQ5_Pos) /*!< 0x01F00000 */
1597 #define ADC_SQR5_SQ5_0 (0x01UL << ADC_SQR5_SQ5_Pos) /*!< 0x00100000 */
1598 #define ADC_SQR5_SQ5_1 (0x02UL << ADC_SQR5_SQ5_Pos) /*!< 0x00200000 */
1599 #define ADC_SQR5_SQ5_2 (0x04UL << ADC_SQR5_SQ5_Pos) /*!< 0x00400000 */
1600 #define ADC_SQR5_SQ5_3 (0x08UL << ADC_SQR5_SQ5_Pos) /*!< 0x00800000 */
1601 #define ADC_SQR5_SQ5_4 (0x10UL << ADC_SQR5_SQ5_Pos) /*!< 0x01000000 */