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Searched refs:ADC_SQR5_SQ3_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h1364 #define ADC_SQR5_SQ3_Pos (10U) macro
1365 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1367 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1368 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1369 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1370 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1371 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l152xba.h1349 #define ADC_SQR5_SQ3_Pos (10U) macro
1350 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1352 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1353 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1354 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1355 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1356 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l100xba.h1346 #define ADC_SQR5_SQ3_Pos (10U) macro
1347 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1349 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1350 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1351 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1352 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1353 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l100xb.h1346 #define ADC_SQR5_SQ3_Pos (10U) macro
1347 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1349 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1350 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1351 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1352 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1353 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l151xb.h1347 #define ADC_SQR5_SQ3_Pos (10U) macro
1348 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1350 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1351 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1352 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1353 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1354 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l151xba.h1347 #define ADC_SQR5_SQ3_Pos (10U) macro
1348 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1350 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1351 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1352 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1353 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1354 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l100xc.h1400 #define ADC_SQR5_SQ3_Pos (10U) macro
1401 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1403 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1404 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1405 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1406 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1407 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l151xc.h1458 #define ADC_SQR5_SQ3_Pos (10U) macro
1459 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1461 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1462 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1463 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1464 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1465 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l151xca.h1462 #define ADC_SQR5_SQ3_Pos (10U) macro
1463 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1465 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1466 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1467 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1468 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1469 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l151xdx.h1479 #define ADC_SQR5_SQ3_Pos (10U) macro
1480 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1482 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1483 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1484 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1485 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1486 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l151xe.h1479 #define ADC_SQR5_SQ3_Pos (10U) macro
1480 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1482 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1483 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1484 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1485 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1486 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l152xc.h1454 #define ADC_SQR5_SQ3_Pos (10U) macro
1455 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1457 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1458 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1459 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1460 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1461 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l152xca.h1479 #define ADC_SQR5_SQ3_Pos (10U) macro
1480 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1482 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1483 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1484 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1485 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1486 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l152xdx.h1496 #define ADC_SQR5_SQ3_Pos (10U) macro
1497 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1499 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1500 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1501 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1502 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1503 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l152xe.h1496 #define ADC_SQR5_SQ3_Pos (10U) macro
1497 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1499 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1500 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1501 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1502 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1503 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l162xc.h1477 #define ADC_SQR5_SQ3_Pos (10U) macro
1478 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1480 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1481 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1482 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1483 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1484 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l162xca.h1502 #define ADC_SQR5_SQ3_Pos (10U) macro
1503 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1505 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1506 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1507 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1508 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1509 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l162xdx.h1519 #define ADC_SQR5_SQ3_Pos (10U) macro
1520 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1522 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1523 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1524 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1525 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1526 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l162xe.h1519 #define ADC_SQR5_SQ3_Pos (10U) macro
1520 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1522 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1523 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1524 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1525 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1526 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l151xd.h1536 #define ADC_SQR5_SQ3_Pos (10U) macro
1537 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1539 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1540 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1541 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1542 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1543 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l152xd.h1553 #define ADC_SQR5_SQ3_Pos (10U) macro
1554 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1556 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1557 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1558 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1559 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1560 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */
Dstm32l162xd.h1576 #define ADC_SQR5_SQ3_Pos (10U) macro
1577 #define ADC_SQR5_SQ3_Msk (0x1FUL << ADC_SQR5_SQ3_Pos) /*!< 0x00007C00 */
1579 #define ADC_SQR5_SQ3_0 (0x01UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000400 */
1580 #define ADC_SQR5_SQ3_1 (0x02UL << ADC_SQR5_SQ3_Pos) /*!< 0x00000800 */
1581 #define ADC_SQR5_SQ3_2 (0x04UL << ADC_SQR5_SQ3_Pos) /*!< 0x00001000 */
1582 #define ADC_SQR5_SQ3_3 (0x08UL << ADC_SQR5_SQ3_Pos) /*!< 0x00002000 */
1583 #define ADC_SQR5_SQ3_4 (0x10UL << ADC_SQR5_SQ3_Pos) /*!< 0x00004000 */