Searched refs:ADC_SQR5_SQ1_0 (Results 1 – 23 of 23) sorted by relevance
436 …( ADC_SQR5_SQ1_0)) /* Channel …438 …( ADC_SQR5_SQ1_1 | ADC_SQR5_SQ1_0)) /* Channel …440 …( ADC_SQR5_SQ1_2 | ADC_SQR5_SQ1_0)) /* Direct (…442 …( ADC_SQR5_SQ1_2 | ADC_SQR5_SQ1_1 | ADC_SQR5_SQ1_0)) /* Channel …444 …( ADC_SQR5_SQ1_3 | ADC_SQR5_SQ1_0)) /* Channel …446 …( ADC_SQR5_SQ1_3 | ADC_SQR5_SQ1_1 | ADC_SQR5_SQ1_0)) /* Channel …448 …( ADC_SQR5_SQ1_3 | ADC_SQR5_SQ1_2 | ADC_SQR5_SQ1_0)) /* Channel …450 …( ADC_SQR5_SQ1_3 | ADC_SQR5_SQ1_2 | ADC_SQR5_SQ1_1 | ADC_SQR5_SQ1_0)) /* Channel …452 …(ADC_SQR5_SQ1_4 | ADC_SQR5_SQ1_0)) /* Channel …454 …(ADC_SQR5_SQ1_4 | ADC_SQR5_SQ1_1 | ADC_SQR5_SQ1_0)) /* Channel …[all …]
1349 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
1334 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
1331 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
1332 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
1385 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
1443 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
1447 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
1464 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
1439 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
1481 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
1462 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
1487 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
1504 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
1521 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
1538 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
1561 #define ADC_SQR5_SQ1_0 (0x01UL << ADC_SQR5_SQ1_Pos) /*!< 0x00000001 */ macro
