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Searched refs:ADC_SQR2_SQ21_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h1199 #define ADC_SQR2_SQ21_Pos (10U) macro
1200 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1202 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1203 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1204 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1205 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1206 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l152xba.h1184 #define ADC_SQR2_SQ21_Pos (10U) macro
1185 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1187 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1188 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1189 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1190 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1191 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l100xba.h1181 #define ADC_SQR2_SQ21_Pos (10U) macro
1182 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1184 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1185 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1186 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1187 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1188 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l100xb.h1181 #define ADC_SQR2_SQ21_Pos (10U) macro
1182 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1184 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1185 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1186 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1187 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1188 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l151xb.h1182 #define ADC_SQR2_SQ21_Pos (10U) macro
1183 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1185 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1186 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1187 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1188 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1189 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l151xba.h1182 #define ADC_SQR2_SQ21_Pos (10U) macro
1183 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1185 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1186 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1187 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1188 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1189 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l100xc.h1235 #define ADC_SQR2_SQ21_Pos (10U) macro
1236 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1238 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1239 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1240 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1241 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1242 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l151xc.h1293 #define ADC_SQR2_SQ21_Pos (10U) macro
1294 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1296 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1297 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1298 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1299 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1300 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l151xca.h1297 #define ADC_SQR2_SQ21_Pos (10U) macro
1298 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1300 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1301 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1302 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1303 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1304 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l151xdx.h1314 #define ADC_SQR2_SQ21_Pos (10U) macro
1315 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1317 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1318 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1319 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1320 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1321 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l151xe.h1314 #define ADC_SQR2_SQ21_Pos (10U) macro
1315 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1317 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1318 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1319 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1320 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1321 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l152xc.h1289 #define ADC_SQR2_SQ21_Pos (10U) macro
1290 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1292 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1293 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1294 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1295 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1296 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l152xca.h1314 #define ADC_SQR2_SQ21_Pos (10U) macro
1315 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1317 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1318 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1319 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1320 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1321 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l152xdx.h1331 #define ADC_SQR2_SQ21_Pos (10U) macro
1332 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1334 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1335 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1336 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1337 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1338 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l152xe.h1331 #define ADC_SQR2_SQ21_Pos (10U) macro
1332 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1334 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1335 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1336 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1337 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1338 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l162xc.h1312 #define ADC_SQR2_SQ21_Pos (10U) macro
1313 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1315 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1316 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1317 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1318 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1319 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l162xca.h1337 #define ADC_SQR2_SQ21_Pos (10U) macro
1338 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1340 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1341 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1342 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1343 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1344 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l162xdx.h1354 #define ADC_SQR2_SQ21_Pos (10U) macro
1355 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1357 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1358 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1359 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1360 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1361 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l162xe.h1354 #define ADC_SQR2_SQ21_Pos (10U) macro
1355 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1357 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1358 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1359 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1360 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1361 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l151xd.h1371 #define ADC_SQR2_SQ21_Pos (10U) macro
1372 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1374 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1375 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1376 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1377 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1378 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l152xd.h1388 #define ADC_SQR2_SQ21_Pos (10U) macro
1389 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1391 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1392 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1393 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1394 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1395 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */
Dstm32l162xd.h1411 #define ADC_SQR2_SQ21_Pos (10U) macro
1412 #define ADC_SQR2_SQ21_Msk (0x1FUL << ADC_SQR2_SQ21_Pos) /*!< 0x00007C00 */
1414 #define ADC_SQR2_SQ21_0 (0x01UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000400 */
1415 #define ADC_SQR2_SQ21_1 (0x02UL << ADC_SQR2_SQ21_Pos) /*!< 0x00000800 */
1416 #define ADC_SQR2_SQ21_2 (0x04UL << ADC_SQR2_SQ21_Pos) /*!< 0x00001000 */
1417 #define ADC_SQR2_SQ21_3 (0x08UL << ADC_SQR2_SQ21_Pos) /*!< 0x00002000 */
1418 #define ADC_SQR2_SQ21_4 (0x10UL << ADC_SQR2_SQ21_Pos) /*!< 0x00004000 */