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Searched refs:ADC_SQR2_SQ20_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h1190 #define ADC_SQR2_SQ20_Pos (5U) macro
1191 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1193 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1194 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1195 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1196 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1197 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l152xba.h1175 #define ADC_SQR2_SQ20_Pos (5U) macro
1176 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1178 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1179 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1180 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1181 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1182 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l100xba.h1172 #define ADC_SQR2_SQ20_Pos (5U) macro
1173 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1175 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1176 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1177 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1178 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1179 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l100xb.h1172 #define ADC_SQR2_SQ20_Pos (5U) macro
1173 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1175 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1176 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1177 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1178 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1179 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l151xb.h1173 #define ADC_SQR2_SQ20_Pos (5U) macro
1174 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1176 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1177 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1178 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1179 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1180 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l151xba.h1173 #define ADC_SQR2_SQ20_Pos (5U) macro
1174 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1176 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1177 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1178 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1179 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1180 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l100xc.h1226 #define ADC_SQR2_SQ20_Pos (5U) macro
1227 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1229 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1230 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1231 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1232 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1233 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l151xc.h1284 #define ADC_SQR2_SQ20_Pos (5U) macro
1285 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1287 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1288 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1289 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1290 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1291 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l151xca.h1288 #define ADC_SQR2_SQ20_Pos (5U) macro
1289 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1291 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1292 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1293 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1294 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1295 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l151xdx.h1305 #define ADC_SQR2_SQ20_Pos (5U) macro
1306 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1308 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1309 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1310 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1311 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1312 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l151xe.h1305 #define ADC_SQR2_SQ20_Pos (5U) macro
1306 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1308 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1309 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1310 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1311 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1312 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l152xc.h1280 #define ADC_SQR2_SQ20_Pos (5U) macro
1281 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1283 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1284 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1285 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1286 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1287 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l152xca.h1305 #define ADC_SQR2_SQ20_Pos (5U) macro
1306 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1308 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1309 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1310 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1311 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1312 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l152xdx.h1322 #define ADC_SQR2_SQ20_Pos (5U) macro
1323 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1325 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1326 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1327 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1328 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1329 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l152xe.h1322 #define ADC_SQR2_SQ20_Pos (5U) macro
1323 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1325 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1326 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1327 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1328 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1329 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l162xc.h1303 #define ADC_SQR2_SQ20_Pos (5U) macro
1304 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1306 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1307 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1308 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1309 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1310 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l162xca.h1328 #define ADC_SQR2_SQ20_Pos (5U) macro
1329 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1331 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1332 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1333 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1334 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1335 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l162xdx.h1345 #define ADC_SQR2_SQ20_Pos (5U) macro
1346 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1348 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1349 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1350 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1351 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1352 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l162xe.h1345 #define ADC_SQR2_SQ20_Pos (5U) macro
1346 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1348 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1349 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1350 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1351 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1352 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l151xd.h1362 #define ADC_SQR2_SQ20_Pos (5U) macro
1363 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1365 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1366 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1367 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1368 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1369 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l152xd.h1379 #define ADC_SQR2_SQ20_Pos (5U) macro
1380 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1382 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1383 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1384 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1385 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1386 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */
Dstm32l162xd.h1402 #define ADC_SQR2_SQ20_Pos (5U) macro
1403 #define ADC_SQR2_SQ20_Msk (0x1FUL << ADC_SQR2_SQ20_Pos) /*!< 0x000003E0 */
1405 #define ADC_SQR2_SQ20_0 (0x01UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000020 */
1406 #define ADC_SQR2_SQ20_1 (0x02UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000040 */
1407 #define ADC_SQR2_SQ20_2 (0x04UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000080 */
1408 #define ADC_SQR2_SQ20_3 (0x08UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000100 */
1409 #define ADC_SQR2_SQ20_4 (0x10UL << ADC_SQR2_SQ20_Pos) /*!< 0x00000200 */