Home
last modified time | relevance | path

Searched refs:ADC_SQR1_SQ26_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h1162 #define ADC_SQR1_SQ26_Pos (5U) macro
1163 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1165 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1166 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1167 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1168 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1169 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l152xba.h1147 #define ADC_SQR1_SQ26_Pos (5U) macro
1148 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1150 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1151 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1152 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1153 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1154 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l100xba.h1144 #define ADC_SQR1_SQ26_Pos (5U) macro
1145 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1147 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1148 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1149 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1150 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1151 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l100xb.h1144 #define ADC_SQR1_SQ26_Pos (5U) macro
1145 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1147 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1148 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1149 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1150 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1151 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l151xb.h1145 #define ADC_SQR1_SQ26_Pos (5U) macro
1146 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1148 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1149 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1150 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1151 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1152 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l151xba.h1145 #define ADC_SQR1_SQ26_Pos (5U) macro
1146 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1148 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1149 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1150 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1151 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1152 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l100xc.h1198 #define ADC_SQR1_SQ26_Pos (5U) macro
1199 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1201 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1202 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1203 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1204 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1205 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l151xc.h1256 #define ADC_SQR1_SQ26_Pos (5U) macro
1257 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1259 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1260 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1261 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1262 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1263 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l151xca.h1260 #define ADC_SQR1_SQ26_Pos (5U) macro
1261 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1263 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1264 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1265 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1266 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1267 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l151xdx.h1277 #define ADC_SQR1_SQ26_Pos (5U) macro
1278 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1280 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1281 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1282 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1283 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1284 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l151xe.h1277 #define ADC_SQR1_SQ26_Pos (5U) macro
1278 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1280 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1281 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1282 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1283 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1284 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l152xc.h1252 #define ADC_SQR1_SQ26_Pos (5U) macro
1253 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1255 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1256 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1257 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1258 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1259 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l152xca.h1277 #define ADC_SQR1_SQ26_Pos (5U) macro
1278 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1280 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1281 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1282 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1283 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1284 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l152xdx.h1294 #define ADC_SQR1_SQ26_Pos (5U) macro
1295 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1297 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1298 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1299 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1300 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1301 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l152xe.h1294 #define ADC_SQR1_SQ26_Pos (5U) macro
1295 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1297 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1298 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1299 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1300 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1301 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l162xc.h1275 #define ADC_SQR1_SQ26_Pos (5U) macro
1276 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1278 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1279 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1280 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1281 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1282 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l162xca.h1300 #define ADC_SQR1_SQ26_Pos (5U) macro
1301 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1303 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1304 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1305 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1306 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1307 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l162xdx.h1317 #define ADC_SQR1_SQ26_Pos (5U) macro
1318 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1320 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1321 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1322 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1323 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1324 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l162xe.h1317 #define ADC_SQR1_SQ26_Pos (5U) macro
1318 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1320 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1321 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1322 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1323 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1324 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l151xd.h1334 #define ADC_SQR1_SQ26_Pos (5U) macro
1335 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1337 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1338 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1339 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1340 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1341 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l152xd.h1351 #define ADC_SQR1_SQ26_Pos (5U) macro
1352 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1354 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1355 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1356 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1357 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1358 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */
Dstm32l162xd.h1374 #define ADC_SQR1_SQ26_Pos (5U) macro
1375 #define ADC_SQR1_SQ26_Msk (0x1FUL << ADC_SQR1_SQ26_Pos) /*!< 0x000003E0 */
1377 #define ADC_SQR1_SQ26_0 (0x01UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000020 */
1378 #define ADC_SQR1_SQ26_1 (0x02UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000040 */
1379 #define ADC_SQR1_SQ26_2 (0x04UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000080 */
1380 #define ADC_SQR1_SQ26_3 (0x08UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000100 */
1381 #define ADC_SQR1_SQ26_4 (0x10UL << ADC_SQR1_SQ26_Pos) /*!< 0x00000200 */