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Searched refs:ADC_SMPR3_SMP7_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h1092 #define ADC_SMPR3_SMP7_Pos (21U) macro
1093 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1095 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1096 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1097 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l152xba.h1077 #define ADC_SMPR3_SMP7_Pos (21U) macro
1078 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1080 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1081 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1082 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l100xba.h1074 #define ADC_SMPR3_SMP7_Pos (21U) macro
1075 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1077 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1078 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1079 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l100xb.h1074 #define ADC_SMPR3_SMP7_Pos (21U) macro
1075 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1077 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1078 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1079 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l151xb.h1075 #define ADC_SMPR3_SMP7_Pos (21U) macro
1076 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1078 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1079 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1080 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l151xba.h1075 #define ADC_SMPR3_SMP7_Pos (21U) macro
1076 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1078 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1079 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1080 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l100xc.h1119 #define ADC_SMPR3_SMP7_Pos (21U) macro
1120 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1122 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1123 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1124 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l151xc.h1177 #define ADC_SMPR3_SMP7_Pos (21U) macro
1178 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1180 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1181 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1182 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l151xca.h1181 #define ADC_SMPR3_SMP7_Pos (21U) macro
1182 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1184 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1185 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1186 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l151xdx.h1198 #define ADC_SMPR3_SMP7_Pos (21U) macro
1199 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1201 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1202 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1203 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l151xe.h1198 #define ADC_SMPR3_SMP7_Pos (21U) macro
1199 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1201 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1202 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1203 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l152xc.h1173 #define ADC_SMPR3_SMP7_Pos (21U) macro
1174 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1176 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1177 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1178 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l152xca.h1198 #define ADC_SMPR3_SMP7_Pos (21U) macro
1199 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1201 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1202 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1203 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l152xdx.h1215 #define ADC_SMPR3_SMP7_Pos (21U) macro
1216 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1218 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1219 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1220 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l152xe.h1215 #define ADC_SMPR3_SMP7_Pos (21U) macro
1216 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1218 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1219 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1220 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l162xc.h1196 #define ADC_SMPR3_SMP7_Pos (21U) macro
1197 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1199 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1200 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1201 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l162xca.h1221 #define ADC_SMPR3_SMP7_Pos (21U) macro
1222 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1224 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1225 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1226 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l162xdx.h1238 #define ADC_SMPR3_SMP7_Pos (21U) macro
1239 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1241 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1242 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1243 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l162xe.h1238 #define ADC_SMPR3_SMP7_Pos (21U) macro
1239 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1241 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1242 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1243 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l151xd.h1255 #define ADC_SMPR3_SMP7_Pos (21U) macro
1256 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1258 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1259 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1260 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l152xd.h1272 #define ADC_SMPR3_SMP7_Pos (21U) macro
1273 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1275 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1276 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1277 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */
Dstm32l162xd.h1295 #define ADC_SMPR3_SMP7_Pos (21U) macro
1296 #define ADC_SMPR3_SMP7_Msk (0x7UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00E00000 */
1298 #define ADC_SMPR3_SMP7_0 (0x1UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00200000 */
1299 #define ADC_SMPR3_SMP7_1 (0x2UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00400000 */
1300 #define ADC_SMPR3_SMP7_2 (0x4UL << ADC_SMPR3_SMP7_Pos) /*!< 0x00800000 */