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Searched refs:ADC_SMPR3_SMP6_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h1085 #define ADC_SMPR3_SMP6_Pos (18U) macro
1086 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1088 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1089 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1090 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l152xba.h1070 #define ADC_SMPR3_SMP6_Pos (18U) macro
1071 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1073 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1074 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1075 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l100xba.h1067 #define ADC_SMPR3_SMP6_Pos (18U) macro
1068 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1070 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1071 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1072 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l100xb.h1067 #define ADC_SMPR3_SMP6_Pos (18U) macro
1068 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1070 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1071 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1072 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l151xb.h1068 #define ADC_SMPR3_SMP6_Pos (18U) macro
1069 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1071 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1072 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1073 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l151xba.h1068 #define ADC_SMPR3_SMP6_Pos (18U) macro
1069 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1071 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1072 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1073 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l100xc.h1112 #define ADC_SMPR3_SMP6_Pos (18U) macro
1113 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1115 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1116 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1117 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l151xc.h1170 #define ADC_SMPR3_SMP6_Pos (18U) macro
1171 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1173 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1174 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1175 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l151xca.h1174 #define ADC_SMPR3_SMP6_Pos (18U) macro
1175 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1177 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1178 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1179 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l151xdx.h1191 #define ADC_SMPR3_SMP6_Pos (18U) macro
1192 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1194 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1195 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1196 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l151xe.h1191 #define ADC_SMPR3_SMP6_Pos (18U) macro
1192 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1194 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1195 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1196 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l152xc.h1166 #define ADC_SMPR3_SMP6_Pos (18U) macro
1167 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1169 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1170 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1171 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l152xca.h1191 #define ADC_SMPR3_SMP6_Pos (18U) macro
1192 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1194 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1195 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1196 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l152xdx.h1208 #define ADC_SMPR3_SMP6_Pos (18U) macro
1209 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1211 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1212 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1213 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l152xe.h1208 #define ADC_SMPR3_SMP6_Pos (18U) macro
1209 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1211 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1212 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1213 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l162xc.h1189 #define ADC_SMPR3_SMP6_Pos (18U) macro
1190 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1192 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1193 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1194 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l162xca.h1214 #define ADC_SMPR3_SMP6_Pos (18U) macro
1215 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1217 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1218 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1219 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l162xdx.h1231 #define ADC_SMPR3_SMP6_Pos (18U) macro
1232 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1234 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1235 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1236 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l162xe.h1231 #define ADC_SMPR3_SMP6_Pos (18U) macro
1232 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1234 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1235 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1236 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l151xd.h1248 #define ADC_SMPR3_SMP6_Pos (18U) macro
1249 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1251 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1252 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1253 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l152xd.h1265 #define ADC_SMPR3_SMP6_Pos (18U) macro
1266 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1268 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1269 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1270 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */
Dstm32l162xd.h1288 #define ADC_SMPR3_SMP6_Pos (18U) macro
1289 #define ADC_SMPR3_SMP6_Msk (0x7UL << ADC_SMPR3_SMP6_Pos) /*!< 0x001C0000 */
1291 #define ADC_SMPR3_SMP6_0 (0x1UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00040000 */
1292 #define ADC_SMPR3_SMP6_1 (0x2UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00080000 */
1293 #define ADC_SMPR3_SMP6_2 (0x4UL << ADC_SMPR3_SMP6_Pos) /*!< 0x00100000 */