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Searched refs:ADC_SMPR3_SMP5_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h1078 #define ADC_SMPR3_SMP5_Pos (15U) macro
1079 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1081 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1082 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1083 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l152xba.h1063 #define ADC_SMPR3_SMP5_Pos (15U) macro
1064 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1066 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1067 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1068 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l100xba.h1060 #define ADC_SMPR3_SMP5_Pos (15U) macro
1061 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1063 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1064 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1065 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l100xb.h1060 #define ADC_SMPR3_SMP5_Pos (15U) macro
1061 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1063 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1064 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1065 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l151xb.h1061 #define ADC_SMPR3_SMP5_Pos (15U) macro
1062 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1064 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1065 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1066 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l151xba.h1061 #define ADC_SMPR3_SMP5_Pos (15U) macro
1062 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1064 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1065 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1066 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l100xc.h1105 #define ADC_SMPR3_SMP5_Pos (15U) macro
1106 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1108 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1109 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1110 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l151xc.h1163 #define ADC_SMPR3_SMP5_Pos (15U) macro
1164 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1166 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1167 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1168 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l151xca.h1167 #define ADC_SMPR3_SMP5_Pos (15U) macro
1168 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1170 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1171 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1172 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l151xdx.h1184 #define ADC_SMPR3_SMP5_Pos (15U) macro
1185 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1187 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1188 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1189 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l151xe.h1184 #define ADC_SMPR3_SMP5_Pos (15U) macro
1185 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1187 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1188 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1189 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l152xc.h1159 #define ADC_SMPR3_SMP5_Pos (15U) macro
1160 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1162 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1163 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1164 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l152xca.h1184 #define ADC_SMPR3_SMP5_Pos (15U) macro
1185 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1187 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1188 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1189 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l152xdx.h1201 #define ADC_SMPR3_SMP5_Pos (15U) macro
1202 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1204 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1205 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1206 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l152xe.h1201 #define ADC_SMPR3_SMP5_Pos (15U) macro
1202 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1204 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1205 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1206 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l162xc.h1182 #define ADC_SMPR3_SMP5_Pos (15U) macro
1183 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1185 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1186 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1187 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l162xca.h1207 #define ADC_SMPR3_SMP5_Pos (15U) macro
1208 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1210 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1211 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1212 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l162xdx.h1224 #define ADC_SMPR3_SMP5_Pos (15U) macro
1225 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1227 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1228 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1229 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l162xe.h1224 #define ADC_SMPR3_SMP5_Pos (15U) macro
1225 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1227 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1228 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1229 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l151xd.h1241 #define ADC_SMPR3_SMP5_Pos (15U) macro
1242 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1244 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1245 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1246 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l152xd.h1258 #define ADC_SMPR3_SMP5_Pos (15U) macro
1259 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1261 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1262 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1263 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */
Dstm32l162xd.h1281 #define ADC_SMPR3_SMP5_Pos (15U) macro
1282 #define ADC_SMPR3_SMP5_Msk (0x7UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00038000 */
1284 #define ADC_SMPR3_SMP5_0 (0x1UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00008000 */
1285 #define ADC_SMPR3_SMP5_1 (0x2UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00010000 */
1286 #define ADC_SMPR3_SMP5_2 (0x4UL << ADC_SMPR3_SMP5_Pos) /*!< 0x00020000 */