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Searched refs:ADC_SMPR3_SMP0_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h1043 #define ADC_SMPR3_SMP0_Pos (0U) macro
1044 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1046 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1047 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1048 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l152xba.h1028 #define ADC_SMPR3_SMP0_Pos (0U) macro
1029 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1031 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1032 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1033 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l100xba.h1025 #define ADC_SMPR3_SMP0_Pos (0U) macro
1026 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1028 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1029 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1030 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l100xb.h1025 #define ADC_SMPR3_SMP0_Pos (0U) macro
1026 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1028 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1029 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1030 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l151xb.h1026 #define ADC_SMPR3_SMP0_Pos (0U) macro
1027 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1029 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1030 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1031 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l151xba.h1026 #define ADC_SMPR3_SMP0_Pos (0U) macro
1027 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1029 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1030 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1031 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l100xc.h1070 #define ADC_SMPR3_SMP0_Pos (0U) macro
1071 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1073 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1074 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1075 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l151xc.h1128 #define ADC_SMPR3_SMP0_Pos (0U) macro
1129 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1131 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1132 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1133 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l151xca.h1132 #define ADC_SMPR3_SMP0_Pos (0U) macro
1133 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1135 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1136 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1137 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l151xdx.h1149 #define ADC_SMPR3_SMP0_Pos (0U) macro
1150 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1152 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1153 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1154 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l151xe.h1149 #define ADC_SMPR3_SMP0_Pos (0U) macro
1150 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1152 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1153 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1154 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l152xc.h1124 #define ADC_SMPR3_SMP0_Pos (0U) macro
1125 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1127 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1128 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1129 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l152xca.h1149 #define ADC_SMPR3_SMP0_Pos (0U) macro
1150 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1152 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1153 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1154 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l152xdx.h1166 #define ADC_SMPR3_SMP0_Pos (0U) macro
1167 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1169 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1170 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1171 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l152xe.h1166 #define ADC_SMPR3_SMP0_Pos (0U) macro
1167 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1169 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1170 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1171 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l162xc.h1147 #define ADC_SMPR3_SMP0_Pos (0U) macro
1148 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1150 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1151 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1152 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l162xca.h1172 #define ADC_SMPR3_SMP0_Pos (0U) macro
1173 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1175 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1176 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1177 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l162xdx.h1189 #define ADC_SMPR3_SMP0_Pos (0U) macro
1190 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1192 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1193 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1194 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l162xe.h1189 #define ADC_SMPR3_SMP0_Pos (0U) macro
1190 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1192 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1193 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1194 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l151xd.h1206 #define ADC_SMPR3_SMP0_Pos (0U) macro
1207 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1209 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1210 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1211 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l152xd.h1223 #define ADC_SMPR3_SMP0_Pos (0U) macro
1224 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1226 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1227 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1228 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */
Dstm32l162xd.h1246 #define ADC_SMPR3_SMP0_Pos (0U) macro
1247 #define ADC_SMPR3_SMP0_Msk (0x7UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000007 */
1249 #define ADC_SMPR3_SMP0_0 (0x1UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000001 */
1250 #define ADC_SMPR3_SMP0_1 (0x2UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000002 */
1251 #define ADC_SMPR3_SMP0_2 (0x4UL << ADC_SMPR3_SMP0_Pos) /*!< 0x00000004 */