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Searched refs:ADC_SMPR1_SMP24_Pos (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h950 #define ADC_SMPR1_SMP24_Pos (12U) macro
951 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
953 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
954 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
955 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l152xba.h935 #define ADC_SMPR1_SMP24_Pos (12U) macro
936 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
938 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
939 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
940 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l100xba.h932 #define ADC_SMPR1_SMP24_Pos (12U) macro
933 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
935 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
936 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
937 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l100xb.h932 #define ADC_SMPR1_SMP24_Pos (12U) macro
933 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
935 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
936 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
937 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l151xb.h933 #define ADC_SMPR1_SMP24_Pos (12U) macro
934 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
936 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
937 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
938 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l151xba.h933 #define ADC_SMPR1_SMP24_Pos (12U) macro
934 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
936 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
937 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
938 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l100xc.h977 #define ADC_SMPR1_SMP24_Pos (12U) macro
978 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
980 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
981 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
982 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l151xc.h1014 #define ADC_SMPR1_SMP24_Pos (12U) macro
1015 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
1017 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
1018 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
1019 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l151xca.h1018 #define ADC_SMPR1_SMP24_Pos (12U) macro
1019 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
1021 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
1022 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
1023 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l151xdx.h1035 #define ADC_SMPR1_SMP24_Pos (12U) macro
1036 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
1038 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
1039 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
1040 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l151xe.h1035 #define ADC_SMPR1_SMP24_Pos (12U) macro
1036 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
1038 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
1039 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
1040 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l152xc.h1031 #define ADC_SMPR1_SMP24_Pos (12U) macro
1032 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
1034 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
1035 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
1036 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l152xca.h1035 #define ADC_SMPR1_SMP24_Pos (12U) macro
1036 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
1038 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
1039 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
1040 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l152xdx.h1052 #define ADC_SMPR1_SMP24_Pos (12U) macro
1053 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
1055 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
1056 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
1057 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l152xe.h1052 #define ADC_SMPR1_SMP24_Pos (12U) macro
1053 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
1055 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
1056 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
1057 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l162xc.h1054 #define ADC_SMPR1_SMP24_Pos (12U) macro
1055 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
1057 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
1058 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
1059 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l162xca.h1058 #define ADC_SMPR1_SMP24_Pos (12U) macro
1059 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
1061 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
1062 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
1063 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l162xdx.h1075 #define ADC_SMPR1_SMP24_Pos (12U) macro
1076 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
1078 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
1079 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
1080 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l162xe.h1075 #define ADC_SMPR1_SMP24_Pos (12U) macro
1076 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
1078 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
1079 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
1080 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l151xd.h1092 #define ADC_SMPR1_SMP24_Pos (12U) macro
1093 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
1095 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
1096 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
1097 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l152xd.h1109 #define ADC_SMPR1_SMP24_Pos (12U) macro
1110 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
1112 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
1113 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
1114 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */
Dstm32l162xd.h1132 #define ADC_SMPR1_SMP24_Pos (12U) macro
1133 #define ADC_SMPR1_SMP24_Msk (0x7UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00007000 */
1135 #define ADC_SMPR1_SMP24_0 (0x1UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00001000 */
1136 #define ADC_SMPR1_SMP24_1 (0x2UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00002000 */
1137 #define ADC_SMPR1_SMP24_2 (0x4UL << ADC_SMPR1_SMP24_Pos) /*!< 0x00004000 */