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Searched refs:ADC_CFGR2_ROVSM_Pos (Results 1 – 25 of 117) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h1201 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1202 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32wb30xx.h1200 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1201 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32wb35xx.h1392 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1393 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32wb55xx.h1438 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1439 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32wb5mxx.h1438 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1439 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h1310 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1311 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32g411xc.h1347 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1348 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32g441xx.h1468 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1469 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32gbk1cb.h1420 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1421 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32g431xx.h1434 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1435 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32g4a1xx.h1548 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1549 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32g491xx.h1514 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1515 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32g473xx.h1603 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1604 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32g471xx.h1525 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1526 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32g483xx.h1637 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1638 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h1302 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1303 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32l412xx.h1267 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1268 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32l433xx.h1460 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1461 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32l451xx.h1447 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1448 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32l442xx.h1421 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1422 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32l431xx.h1401 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1402 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32l432xx.h1386 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1387 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32l443xx.h1495 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1496 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
Dstm32l471xx.h1557 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1558 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h1901 #define ADC_CFGR2_ROVSM_Pos (10U) macro
1902 #define ADC_CFGR2_ROVSM_Msk (0x1UL << ADC_CFGR2_ROVSM_Pos) /*!< 0x00000400 */

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