ADC_CFGR1_AWD1CH_1 (reference) in projects: hal_stm32-latest

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Searched refs:ADC_CFGR1_AWD1CH_1 (Results 1 – 25 of 70) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
D	stm32c0xx_ll_adc.h	123 #define ADC_CHANNEL_2_NUMBER (ADC_CFGR1_AWD1CH_1) 124 #define ADC_CHANNEL_3_NUMBER (ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 127 #define ADC_CHANNEL_6_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 128 #define ADC_CHANNEL_7_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 131 #define ADC_CHANNEL_10_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_1) 132 #define ADC_CHANNEL_11_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 135 …e ADC_CHANNEL_14_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 137 ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 140 #define ADC_CHANNEL_18_NUMBER (ADC_CFGR1_AWD1CH_4 \| ADC_CFGR1_AWD1CH_1) 142 #define ADC_CHANNEL_19_NUMBER (ADC_CFGR1_AWD1CH_4 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… [all …]
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
D	stm32u0xx_ll_adc.h	123 #define ADC_CHANNEL_2_NUMBER (ADC_CFGR1_AWD1CH_1) 124 #define ADC_CHANNEL_3_NUMBER (ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 127 #define ADC_CHANNEL_6_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 128 #define ADC_CHANNEL_7_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 131 #define ADC_CHANNEL_10_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_1) 132 #define ADC_CHANNEL_11_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 135 …e ADC_CHANNEL_14_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 137 ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 140 #define ADC_CHANNEL_18_NUMBER (ADC_CFGR1_AWD1CH_4 \| ADC_CFGR1_AWD1CH_1) 141 #define ADC_CHANNEL_19_NUMBER (ADC_CFGR1_AWD1CH_4 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD…
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
D	stm32wlxx_ll_adc.h	125 #define ADC_CHANNEL_2_NUMBER (ADC_CFGR1_AWD1CH_1) 126 #define ADC_CHANNEL_3_NUMBER (ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 129 #define ADC_CHANNEL_6_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 130 #define ADC_CHANNEL_7_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 133 #define ADC_CHANNEL_10_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_1) 134 #define ADC_CHANNEL_11_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 137 …e ADC_CHANNEL_14_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 139 ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 142 #define ADC_CHANNEL_18_NUMBER (ADC_CFGR1_AWD1CH_4 \| ADC_CFGR1_AWD1CH_1)
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
D	stm32wbaxx_ll_adc.h	123 #define ADC_CHANNEL_2_NUMBER (ADC_CFGR1_AWD1CH_1) 124 #define ADC_CHANNEL_3_NUMBER (ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 127 #define ADC_CHANNEL_6_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 128 #define ADC_CHANNEL_7_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 131 #define ADC_CHANNEL_10_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_1) 132 #define ADC_CHANNEL_11_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 135 …e ADC_CHANNEL_14_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 137 ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 140 #define ADC_CHANNEL_18_NUMBER (ADC_CFGR1_AWD1CH_4 \| ADC_CFGR1_AWD1CH_1)
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
D	stm32g0xx_ll_adc.h	125 #define ADC_CHANNEL_2_NUMBER (ADC_CFGR1_AWD1CH_1) 126 #define ADC_CHANNEL_3_NUMBER (ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 129 #define ADC_CHANNEL_6_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 130 #define ADC_CHANNEL_7_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 133 #define ADC_CHANNEL_10_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_1) 134 #define ADC_CHANNEL_11_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 137 …e ADC_CHANNEL_14_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 139 ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 142 #define ADC_CHANNEL_18_NUMBER (ADC_CFGR1_AWD1CH_4 \| ADC_CFGR1_AWD1CH_1)
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
D	stm32u5xx_ll_adc.h	279 #define ADC_CHANNEL_2_NUMBER (ADC_CFGR1_AWD1CH_1) 280 #define ADC_CHANNEL_3_NUMBER (ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 283 #define ADC_CHANNEL_6_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 284 #define ADC_CHANNEL_7_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 287 #define ADC_CHANNEL_10_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_1) 288 #define ADC_CHANNEL_11_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 291 #define ADC_CHANNEL_14_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 292 #define ADC_CHANNEL_15_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| A… 295 #define ADC_CHANNEL_18_NUMBER (ADC_CFGR1_AWD1CH_4 \| ADC_CFGR1_AWD1CH_1) 296 #define ADC_CHANNEL_19_NUMBER (ADC_CFGR1_AWD1CH_4 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) [all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
D	stm32n6xx_ll_adc.h	309 #define ADC_CHANNEL_2_NUMBER (ADC_CFGR1_AWD1CH_1) 310 #define ADC_CHANNEL_3_NUMBER (ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 313 #define ADC_CHANNEL_6_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 314 #define ADC_CHANNEL_7_NUMBER (ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 317 #define ADC_CHANNEL_10_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_1) 318 #define ADC_CHANNEL_11_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD… 321 …e ADC_CHANNEL_14_NUMBER (ADC_CFGR1_AWD1CH_3 \| ADC_CFGR1_AWD1CH_2 \| ADC_CFGR1_AWD1CH_1) 323 ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD1CH_0) 326 #define ADC_CHANNEL_18_NUMBER (ADC_CFGR1_AWD1CH_4 \| ADC_CFGR1_AWD1CH_1) 327 #define ADC_CHANNEL_19_NUMBER (ADC_CFGR1_AWD1CH_4 \| ADC_CFGR1_AWD1CH_1 \| ADC_CFGR1_AWD…
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
D	stm32f030x6.h	`680 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 691 #define ADC_CFGR1_AWDCH_1 (ADC_CFGR1_AWD1CH_1)`
D	stm32f030x8.h	`696 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 707 #define ADC_CFGR1_AWDCH_1 (ADC_CFGR1_AWD1CH_1)`
D	stm32f070x6.h	`725 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 736 #define ADC_CFGR1_AWDCH_1 (ADC_CFGR1_AWD1CH_1)`
D	stm32f031x6.h	`690 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 701 #define ADC_CFGR1_AWDCH_1 (ADC_CFGR1_AWD1CH_1)`
D	stm32f030xc.h	`712 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 723 #define ADC_CFGR1_AWDCH_1 (ADC_CFGR1_AWD1CH_1)`
D	stm32f038xx.h	`689 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 700 #define ADC_CFGR1_AWDCH_1 (ADC_CFGR1_AWD1CH_1)`
D	stm32f070xb.h	`748 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 759 #define ADC_CFGR1_AWDCH_1 (ADC_CFGR1_AWD1CH_1)`
D	stm32f058xx.h	`795 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 806 #define ADC_CFGR1_AWDCH_1 (ADC_CFGR1_AWD1CH_1)`
D	stm32f051x8.h	`796 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 807 #define ADC_CFGR1_AWDCH_1 (ADC_CFGR1_AWD1CH_1)`
D	stm32f071xb.h	`830 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 841 #define ADC_CFGR1_AWDCH_1 (ADC_CFGR1_AWD1CH_1)`
D	stm32f042x6.h	`859 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 870 #define ADC_CFGR1_AWDCH_1 (ADC_CFGR1_AWD1CH_1)`
D	stm32f048xx.h	`859 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 870 #define ADC_CFGR1_AWDCH_1 (ADC_CFGR1_AWD1CH_1)`
D	stm32f072xb.h	`934 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 945 #define ADC_CFGR1_AWDCH_1 (ADC_CFGR1_AWD1CH_1)`
D	stm32f091xc.h	`916 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 927 #define ADC_CFGR1_AWDCH_1 (ADC_CFGR1_AWD1CH_1)`
D	stm32f098xx.h	`916 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 927 #define ADC_CFGR1_AWDCH_1 (ADC_CFGR1_AWD1CH_1)`
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
D	stm32wb1mxx.h	`1153 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 1223 #define ADC_CFGR_AWD1CH_1 ADC_CFGR1_AWD1CH_1`
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
D	stm32wb10xx.h	`1138 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 1208 #define ADC_CFGR_AWD1CH_1 ADC_CFGR1_AWD1CH_1`
D	stm32wb15xx.h	`1153 #define ADC_CFGR1_AWD1CH_1 (0x02UL << ADC_CFGR1_AWD1CH_Pos) /!< 0x08000000 / macro 1223 #define ADC_CFGR_AWD1CH_1 ADC_CFGR1_AWD1CH_1`

12 3

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