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Searched refs:ADC_AWD2CR_AWD2CH_0 (Results 1 – 25 of 173) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_adc.h242 #define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0)
317 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
337 #define ADC_AWD_TR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
1515 … (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
1521 … (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
5019 … | (ADC_AWD2CR_AWD2CH_0 << (analog_wd_monit_channels >> ADC_CFGR_AWD1CH_Pos)) in LL_ADC_GetAnalogWDMonitChannels()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_adc.h238 #define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0)
313 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
338 #define ADC_AWD_TR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
1746 … (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
1752 … (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
5941 … | (ADC_AWD2CR_AWD2CH_0 << (AnalogWDMonitChannels >> ADC_CFGR_AWD1CH_Pos)) in LL_ADC_GetAnalogWDMonitChannels()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_adc.h226 #define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0)
308 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
2242 …(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
2248 …(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
6007 … | (ADC_AWD2CR_AWD2CH_0 << (analog_wd_monit_channels >> ADC_CFGR_AWD1CH_Pos)) in LL_ADC_GetAnalogWDMonitChannels()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_adc.h236 #define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0)
316 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
2210 …(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
2216 …(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
5941 … | (ADC_AWD2CR_AWD2CH_0 << (analog_wd_monit_channels >> ADC_CFGR_AWD1CH_Pos)) in LL_ADC_GetAnalogWDMonitChannels()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_adc.h237 #define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0)
317 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
2261 …(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
2267 …(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
5997 … | (ADC_AWD2CR_AWD2CH_0 << (analog_wd_monit_channels >> ADC_CFGR_AWD1CH_Pos)) in LL_ADC_GetAnalogWDMonitChannels()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_adc.h237 #define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0)
317 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
2131 …(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
2137 …(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
5674 … | (ADC_AWD2CR_AWD2CH_0 << (analog_wd_monit_channels >> ADC_CFGR_AWD1CH_Pos)) in LL_ADC_GetAnalogWDMonitChannels()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_adc.h266 #define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0)
355 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
1615 … (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
1621 … (ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
6082 … | (ADC_AWD2CR_AWD2CH_0 << (AnalogWDMonitChannels >> ADC_CFGR_AWD1CH_Pos)) in LL_ADC_GetAnalogWDMonitChannels()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_adc.h236 #define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0)
316 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
2606 …(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
2612 …(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
6882 … | (ADC_AWD2CR_AWD2CH_0 << (analog_wd_monit_channels >> ADC_CFGR_AWD1CH_Pos)) in LL_ADC_GetAnalogWDMonitChannels()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_adc.h305 #define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0)
421 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
451 #define ADC_AWD_TR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
2111 …(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
2114 …(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | \
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_adc.h193 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
3794 … | (ADC_AWD2CR_AWD2CH_0 << (analog_wd_monit_channels >> ADC_CFGR1_AWD1CH_Pos)) in LL_ADC_GetAnalogWDMonitChannels()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_adc.h191 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
3739 … | (ADC_AWD2CR_AWD2CH_0 << (analog_wd_monit_channels >> ADC_CFGR1_AWD1CH_Pos)) in LL_ADC_GetAnalogWDMonitChannels()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_adc.h205 #define ADC_CHANNEL_0_BITFIELD (ADC_AWD2CR_AWD2CH_0)
339 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
5504 … | (ADC_AWD2CR_AWD2CH_0 << (analog_wd_monit_channels >> ADC_CFGR1_AWD1CH_Pos)) in LL_ADC_GetAnalogWDMonitChannels()
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_adc.h194 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
4051 … | (ADC_AWD2CR_AWD2CH_0 << (analog_wd_monit_channels >> ADC_CFGR1_AWD1CH_Pos)) in LL_ADC_GetAnalogWDMonitChannels()
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_adc.h201 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
4143 … | (ADC_AWD2CR_AWD2CH_0 << (AnalogWDMonitChannels >> ADC_CFGR1_AWD1CH_Pos)) in LL_ADC_GetAnalogWDMonitChannels()
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_adc.h194 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
4119 … | (ADC_AWD2CR_AWD2CH_0 << (analog_wd_monit_channels >> ADC_CFGR1_AWD1CH_Pos)) in LL_ADC_GetAnalogWDMonitChannels()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_adc.h328 #define ADC_AWD_CR12_REGOFFSETGAP_MASK (ADC_AWD2CR_AWD2CH_0)
1633 …(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) | …
1639 …(ADC_AWD2CR_AWD2CH_0 << (__DECIMAL_NB__)) …
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h1275 #define ADC_AWD2CR_AWD2CH_0 (0x00001UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000001 */ macro
Dstm32c031xx.h1279 #define ADC_AWD2CR_AWD2CH_0 (0x00001UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000001 */ macro
Dstm32c071xx.h1356 #define ADC_AWD2CR_AWD2CH_0 (0x00001UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000001 */ macro
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h1308 #define ADC_AWD2CR_AWD2CH_0 (0x00001UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000001 */ macro
Dstm32g050xx.h1327 #define ADC_AWD2CR_AWD2CH_0 (0x00001UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000001 */ macro
Dstm32g070xx.h1330 #define ADC_AWD2CR_AWD2CH_0 (0x00001UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000001 */ macro
Dstm32g031xx.h1351 #define ADC_AWD2CR_AWD2CH_0 (0x00001UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000001 */ macro
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h1620 #define ADC_AWD2CR_AWD2CH_0 (0x00001UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000001 */ macro
Dstm32f318xx.h1621 #define ADC_AWD2CR_AWD2CH_0 (0x00001UL << ADC_AWD2CR_AWD2CH_Pos) /*!< 0x00000001 */ macro

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