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Searched refs:TSC_IOHCR_G2_IO1_Pos (Results 1 – 25 of 79) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5487 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
5488 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32f051x8.h5518 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
5519 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32f071xb.h6071 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
6072 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32f048xx.h9257 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
9258 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32f042x6.h9293 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
9294 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32f072xb.h9868 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
9869 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32f078xx.h9838 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
9839 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
/hal_stm32-3.7.0/stm32cube/stm32l0xx/soc/
Dstm32l062xx.h6181 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
6182 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32l053xx.h6203 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
6204 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32l052xx.h6044 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
6045 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32l073xx.h6499 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
6500 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32l082xx.h6477 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
6478 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32l083xx.h6636 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
6637 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32l063xx.h6338 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
6339 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32l072xx.h6340 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
6341 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
/hal_stm32-3.7.0/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7305 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
7306 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32f318xx.h7292 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
7293 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32f373xc.h10483 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
10484 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32f378xx.h10381 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
10382 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9215 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
9216 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
/hal_stm32-3.7.0/stm32cube/stm32l4xx/soc/
Dstm32l412xx.h9118 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
9119 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32l422xx.h9343 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
9344 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
/hal_stm32-3.7.0/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h7798 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
7799 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
Dstm32wb15xx.h7970 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
7971 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */
/hal_stm32-3.7.0/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h7970 #define TSC_IOHCR_G2_IO1_Pos (4U) macro
7971 #define TSC_IOHCR_G2_IO1_Msk (0x1UL << TSC_IOHCR_G2_IO1_Pos) /*!< 0x00000010 */

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