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Searched refs:TSC_IOCCR_G3_IO3_Pos (Results 1 – 25 of 79) sorted by relevance

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/hal_stm32-3.7.0/stm32cube/stm32f0xx/soc/
Dstm32f058xx.h5799 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
5800 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32f051x8.h5830 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
5831 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32f071xb.h6383 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
6384 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32f048xx.h9569 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
9570 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32f042x6.h9605 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
9606 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32f072xb.h10180 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
10181 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32f078xx.h10150 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
10151 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
/hal_stm32-3.7.0/stm32cube/stm32l0xx/soc/
Dstm32l062xx.h6493 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
6494 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32l053xx.h6515 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
6516 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32l052xx.h6356 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
6357 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32l073xx.h6811 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
6812 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32l082xx.h6789 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
6790 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32l083xx.h6948 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
6949 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32l063xx.h6650 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
6651 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32l072xx.h6652 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
6653 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
/hal_stm32-3.7.0/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h7617 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
7618 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32f318xx.h7604 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
7605 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32f373xc.h10795 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
10796 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32f378xx.h10693 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
10694 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
/hal_stm32-3.7.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h9437 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
9438 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
/hal_stm32-3.7.0/stm32cube/stm32l4xx/soc/
Dstm32l412xx.h9286 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
9287 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32l422xx.h9511 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
9512 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
/hal_stm32-3.7.0/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8074 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
8075 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
Dstm32wb15xx.h8246 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
8247 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */
/hal_stm32-3.7.0/stm32cube/stm32wbxx/soc/
Dstm32wb1mxx.h8246 #define TSC_IOCCR_G3_IO3_Pos (10U) macro
8247 #define TSC_IOCCR_G3_IO3_Msk (0x1UL << TSC_IOCCR_G3_IO3_Pos) /*!< 0x00000400 */

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