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Searched refs:RCC_CR_HSIDIV_0 (Results 1 – 24 of 24) sorted by relevance

/hal_stm32-3.6.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_rcc.h245 #define LL_RCC_HSI_DIV_2 RCC_CR_HSIDIV_0 /*!< HSI divid…
247 #define LL_RCC_HSI_DIV_8 (RCC_CR_HSIDIV_1 | RCC_CR_HSIDIV_0) /*!< HSI divid…
249 #define LL_RCC_HSI_DIV_32 (RCC_CR_HSIDIV_2 | RCC_CR_HSIDIV_0) /*!< HSI divid…
Dstm32c0xx_hal_rcc.h281 #define RCC_HSI_DIV2 RCC_CR_HSIDIV_0 /*!< HSI …
283 #define RCC_HSI_DIV8 (RCC_CR_HSIDIV_1|RCC_CR_HSIDIV_0) /*!< HSI …
285 #define RCC_HSI_DIV32 (RCC_CR_HSIDIV_2|RCC_CR_HSIDIV_0) /*!< HSI …
287 #define RCC_HSI_DIV128 (RCC_CR_HSIDIV_2|RCC_CR_HSIDIV_1|RCC_CR_HSIDIV_0) /*!< HSI …
/hal_stm32-3.6.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_rcc.h264 #define LL_RCC_HSI_DIV_2 RCC_CR_HSIDIV_0 /*!< HSI divid…
266 #define LL_RCC_HSI_DIV_8 (RCC_CR_HSIDIV_1 | RCC_CR_HSIDIV_0) /*!< HSI divid…
268 #define LL_RCC_HSI_DIV_32 (RCC_CR_HSIDIV_2 | RCC_CR_HSIDIV_0) /*!< HSI divid…
Dstm32g0xx_hal_rcc.h410 #define RCC_HSI_DIV2 RCC_CR_HSIDIV_0 /*!< HSI …
412 #define RCC_HSI_DIV8 (RCC_CR_HSIDIV_1|RCC_CR_HSIDIV_0) /*!< HSI …
414 #define RCC_HSI_DIV32 (RCC_CR_HSIDIV_2|RCC_CR_HSIDIV_0) /*!< HSI …
416 #define RCC_HSI_DIV128 (RCC_CR_HSIDIV_2|RCC_CR_HSIDIV_1|RCC_CR_HSIDIV_0) /*!< HSI …
/hal_stm32-3.6.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h213 #define RCC_HSI_DIV2 RCC_CR_HSIDIV_0 /*!< HSI clock is div…
215 #define RCC_HSI_DIV8 (RCC_CR_HSIDIV_1|RCC_CR_HSIDIV_0) /*!< HSI clock is div…
Dstm32h5xx_ll_rcc.h178 #define LL_RCC_HSI_DIV_2 RCC_CR_HSIDIV_0 /*!< HSI_DIV2 clock activation */
/hal_stm32-3.6.0/stm32cube/stm32c0xx/soc/
Dstm32c031xx.h4042 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000800 */ macro
Dstm32c011xx.h3891 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000800 */ macro
/hal_stm32-3.6.0/stm32cube/stm32g0xx/soc/
Dstm32g070xx.h4130 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000800 */ macro
Dstm32g050xx.h4001 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000800 */ macro
Dstm32g030xx.h3982 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000800 */ macro
Dstm32g051xx.h4498 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000800 */ macro
Dstm32g031xx.h4162 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000800 */ macro
Dstm32g041xx.h4398 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000800 */ macro
Dstm32g061xx.h4734 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000800 */ macro
Dstm32g071xx.h4833 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000800 */ macro
Dstm32g0b0xx.h5099 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000800 */ macro
Dstm32g081xx.h5069 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000800 */ macro
Dstm32g0b1xx.h6077 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000800 */ macro
Dstm32g0c1xx.h6313 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000800 */ macro
/hal_stm32-3.6.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h8621 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000008… macro
Dstm32h562xx.h13001 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000008… macro
Dstm32h563xx.h15085 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000008… macro
Dstm32h573xx.h15630 #define RCC_CR_HSIDIV_0 (0x1UL << RCC_CR_HSIDIV_Pos) /*!< 0x00000008… macro