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Searched refs:CRS_ICR_ESYNCC_Pos (Results 1 – 25 of 114) sorted by relevance

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/hal_stm32-3.6.0/stm32cube/stm32l0xx/soc/
Dstm32l052xx.h1251 #define CRS_ICR_ESYNCC_Pos (3U) macro
1252 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32l053xx.h1273 #define CRS_ICR_ESYNCC_Pos (3U) macro
1274 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32l062xx.h1379 #define CRS_ICR_ESYNCC_Pos (3U) macro
1380 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32l063xx.h1401 #define CRS_ICR_ESYNCC_Pos (3U) macro
1402 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32l072xx.h1278 #define CRS_ICR_ESYNCC_Pos (3U) macro
1279 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32l073xx.h1300 #define CRS_ICR_ESYNCC_Pos (3U) macro
1301 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32l082xx.h1406 #define CRS_ICR_ESYNCC_Pos (3U) macro
1407 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32l083xx.h1428 #define CRS_ICR_ESYNCC_Pos (3U) macro
1429 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
/hal_stm32-3.6.0/stm32cube/stm32f0xx/soc/
Dstm32f071xb.h1409 #define CRS_ICR_ESYNCC_Pos (3U) macro
1410 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32f042x6.h4957 #define CRS_ICR_ESYNCC_Pos (3U) macro
4958 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32f048xx.h4957 #define CRS_ICR_ESYNCC_Pos (3U) macro
4958 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32f072xb.h5168 #define CRS_ICR_ESYNCC_Pos (3U) macro
5169 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32f078xx.h5168 #define CRS_ICR_ESYNCC_Pos (3U) macro
5169 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32f098xx.h5150 #define CRS_ICR_ESYNCC_Pos (3U) macro
5151 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32f091xc.h5150 #define CRS_ICR_ESYNCC_Pos (3U) macro
5151 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
/hal_stm32-3.6.0/stm32cube/stm32g0xx/soc/
Dstm32g0b1xx.h2226 #define CRS_ICR_ESYNCC_Pos (3U) macro
2227 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32g0c1xx.h2462 #define CRS_ICR_ESYNCC_Pos (3U) macro
2463 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
/hal_stm32-3.6.0/stm32cube/stm32l4xx/soc/
Dstm32l412xx.h2335 #define CRS_ICR_ESYNCC_Pos (3U) macro
2336 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32l422xx.h2370 #define CRS_ICR_ESYNCC_Pos (3U) macro
2371 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
/hal_stm32-3.6.0/stm32cube/stm32g4xx/soc/
Dstm32g431xx.h2452 #define CRS_ICR_ESYNCC_Pos (3U) macro
2453 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32gbk1cb.h2438 #define CRS_ICR_ESYNCC_Pos (3U) macro
2439 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32g441xx.h2673 #define CRS_ICR_ESYNCC_Pos (3U) macro
2674 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
/hal_stm32-3.6.0/stm32cube/stm32wbxx/soc/
Dstm32wb35xx.h12385 #define CRS_ICR_ESYNCC_Pos (3U) macro
12386 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
Dstm32wb55xx.h13290 #define CRS_ICR_ESYNCC_Pos (3U) macro
13291 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008 */
/hal_stm32-3.6.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h2984 #define CRS_ICR_ESYNCC_Pos (3U) macro
2985 #define CRS_ICR_ESYNCC_Msk (0x1UL << CRS_ICR_ESYNCC_Pos) /*!< 0x00000008…

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