Searched refs:RCC_APBENR1_TIM3EN (Results 1 – 18 of 18) sorted by relevance
/hal_stm32-3.5.0/stm32cube/stm32c0xx/drivers/include/ |
D | stm32c0xx_hal_rcc.h | 665 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN); \ 667 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN); \ 720 #define __HAL_RCC_TIM3_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN) 871 #define __HAL_RCC_TIM3_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN) != 0U) 879 #define __HAL_RCC_TIM3_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN) == 0U)
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D | stm32c0xx_ll_bus.h | 88 #define LL_APB1_GRP1_PERIPH_TIM3 RCC_APBENR1_TIM3EN
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/hal_stm32-3.5.0/stm32cube/stm32g0xx/drivers/include/ |
D | stm32g0xx_hal_rcc.h | 987 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN); \ 989 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN); \ 1337 #define __HAL_RCC_TIM3_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN) 1499 #define __HAL_RCC_TIM3_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN) != 0U) 1563 #define __HAL_RCC_TIM3_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN) == 0U)
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D | stm32g0xx_ll_bus.h | 101 #define LL_APB1_GRP1_PERIPH_TIM3 RCC_APBENR1_TIM3EN
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/hal_stm32-3.5.0/stm32cube/stm32c0xx/soc/ |
D | stm32c011xx.h | 4158 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
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D | stm32c031xx.h | 4315 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
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/hal_stm32-3.5.0/stm32cube/stm32g0xx/soc/ |
D | stm32g030xx.h | 4311 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
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D | stm32g070xx.h | 4474 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
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D | stm32g050xx.h | 4339 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
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D | stm32g031xx.h | 4516 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
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D | stm32g041xx.h | 4764 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
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D | stm32g051xx.h | 4864 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
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D | stm32g061xx.h | 5112 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
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D | stm32g071xx.h | 5214 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
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D | stm32g081xx.h | 5462 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
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D | stm32g0b0xx.h | 5502 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
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D | stm32g0c1xx.h | 6793 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
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D | stm32g0b1xx.h | 6545 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
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