Home
last modified time | relevance | path

Searched refs:RCC_APBENR1_TIM3EN (Results 1 – 18 of 18) sorted by relevance

/hal_stm32-3.5.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h665 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN); \
667 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN); \
720 #define __HAL_RCC_TIM3_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN)
871 #define __HAL_RCC_TIM3_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN) != 0U)
879 #define __HAL_RCC_TIM3_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN) == 0U)
Dstm32c0xx_ll_bus.h88 #define LL_APB1_GRP1_PERIPH_TIM3 RCC_APBENR1_TIM3EN
/hal_stm32-3.5.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h987 SET_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN); \
989 … tmpreg = READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN); \
1337 #define __HAL_RCC_TIM3_CLK_DISABLE() CLEAR_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN)
1499 #define __HAL_RCC_TIM3_IS_CLK_ENABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN) != 0U)
1563 #define __HAL_RCC_TIM3_IS_CLK_DISABLED() (READ_BIT(RCC->APBENR1, RCC_APBENR1_TIM3EN) == 0U)
Dstm32g0xx_ll_bus.h101 #define LL_APB1_GRP1_PERIPH_TIM3 RCC_APBENR1_TIM3EN
/hal_stm32-3.5.0/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h4158 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
Dstm32c031xx.h4315 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
/hal_stm32-3.5.0/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h4311 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
Dstm32g070xx.h4474 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
Dstm32g050xx.h4339 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
Dstm32g031xx.h4516 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
Dstm32g041xx.h4764 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
Dstm32g051xx.h4864 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
Dstm32g061xx.h5112 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
Dstm32g071xx.h5214 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
Dstm32g081xx.h5462 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
Dstm32g0b0xx.h5502 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
Dstm32g0c1xx.h6793 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro
Dstm32g0b1xx.h6545 #define RCC_APBENR1_TIM3EN RCC_APBENR1_TIM3EN_Msk macro