/hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/include/ |
D | stm32wbxx_hal_qspi.h | 309 #define QSPI_ADDRESS_2_LINES ((uint32_t)QUADSPI_CCR_ADMODE_1) /*!<Address on two lines*/
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/hal_stm32-3.5.0/stm32cube/stm32mp1xx/drivers/include/ |
D | stm32mp1xx_hal_qspi.h | 335 #define QSPI_ADDRESS_2_LINES ((uint32_t)QUADSPI_CCR_ADMODE_1) /*!<Address on two lines*/
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/hal_stm32-3.5.0/stm32cube/stm32g4xx/drivers/include/ |
D | stm32g4xx_hal_qspi.h | 334 #define QSPI_ADDRESS_2_LINES ((uint32_t)QUADSPI_CCR_ADMODE_1) /*!<Address on two lines*/
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/hal_stm32-3.5.0/stm32cube/stm32f4xx/drivers/include/ |
D | stm32f4xx_hal_qspi.h | 334 #define QSPI_ADDRESS_2_LINES ((uint32_t)QUADSPI_CCR_ADMODE_1) /*!<Address on two lines*/
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/hal_stm32-3.5.0/stm32cube/stm32f7xx/drivers/include/ |
D | stm32f7xx_hal_qspi.h | 334 #define QSPI_ADDRESS_2_LINES ((uint32_t)QUADSPI_CCR_ADMODE_1) /*!<Address on two lines*/
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/hal_stm32-3.5.0/stm32cube/stm32h7xx/drivers/include/ |
D | stm32h7xx_hal_qspi.h | 330 #define QSPI_ADDRESS_2_LINES ((uint32_t)QUADSPI_CCR_ADMODE_1) /*!<Address on two lines*/
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/hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/include/ |
D | stm32l4xx_hal_qspi.h | 339 #define QSPI_ADDRESS_2_LINES ((uint32_t)QUADSPI_CCR_ADMODE_1) /*!<Address on two lines*/
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/hal_stm32-3.5.0/stm32cube/stm32l4xx/soc/ |
D | stm32l412xx.h | 7432 #define QUADSPI_CCR_ADMODE_1 (0x2UL << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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D | stm32l422xx.h | 7657 #define QUADSPI_CCR_ADMODE_1 (0x2UL << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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D | stm32l451xx.h | 12175 #define QUADSPI_CCR_ADMODE_1 (0x2UL << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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/hal_stm32-3.5.0/stm32cube/stm32wbxx/soc/ |
D | stm32wb35xx.h | 7014 #define QUADSPI_CCR_ADMODE_1 (0x2U << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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D | stm32wb5mxx.h | 7205 #define QUADSPI_CCR_ADMODE_1 (0x2U << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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D | stm32wb55xx.h | 7205 #define QUADSPI_CCR_ADMODE_1 (0x2U << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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/hal_stm32-3.5.0/stm32cube/stm32g4xx/soc/ |
D | stm32g471xx.h | 7658 #define QUADSPI_CCR_ADMODE_1 (0x2UL << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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D | stm32g4a1xx.h | 7730 #define QUADSPI_CCR_ADMODE_1 (0x2UL << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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D | stm32g473xx.h | 8172 #define QUADSPI_CCR_ADMODE_1 (0x2UL << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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D | stm32g491xx.h | 7509 #define QUADSPI_CCR_ADMODE_1 (0x2UL << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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D | stm32g483xx.h | 8393 #define QUADSPI_CCR_ADMODE_1 (0x2UL << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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/hal_stm32-3.5.0/stm32cube/stm32f4xx/soc/ |
D | stm32f423xx.h | 9410 #define QUADSPI_CCR_ADMODE_1 (0x2UL << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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D | stm32f412rx.h | 9134 #define QUADSPI_CCR_ADMODE_1 (0x2UL << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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D | stm32f412zx.h | 9140 #define QUADSPI_CCR_ADMODE_1 (0x2UL << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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D | stm32f412vx.h | 9136 #define QUADSPI_CCR_ADMODE_1 (0x2UL << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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D | stm32f413xx.h | 9374 #define QUADSPI_CCR_ADMODE_1 (0x2UL << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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/hal_stm32-3.5.0/stm32cube/stm32f7xx/soc/ |
D | stm32f723xx.h | 9030 #define QUADSPI_CCR_ADMODE_1 (0x2UL << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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D | stm32f722xx.h | 9014 #define QUADSPI_CCR_ADMODE_1 (0x2UL << QUADSPI_CCR_ADMODE_Pos) /*!< 0x00000800 */ macro
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