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Searched refs:Structure (Results 1 – 25 of 36) sorted by relevance

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/hal_stm32-3.4.0/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_hal_tim.c202 static void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure);
6305 static void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
6315 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
6322 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
6326 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
6331 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
6334 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_hal_tim.c202 static void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure);
6432 static void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
6442 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
6449 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
6453 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
6458 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
6461 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32mp1xx/drivers/src/
Dstm32mp1xx_hal_tim.c5946 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
5956 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
5963 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
5967 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
5972 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
5975 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
5980 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_hal_tim.c6643 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
6653 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
6660 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
6664 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
6669 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
6672 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
6677 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_hal_tim.c6642 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
6652 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
6659 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
6663 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
6668 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
6671 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
6676 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_hal_tim.c6940 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
6950 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
6957 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
6961 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
6966 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
6969 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
6974 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_hal_tim.c6967 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
6977 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
6984 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
6988 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
6993 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
6996 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
7001 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_tim.c6921 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
6931 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
6938 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
6942 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
6947 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
6950 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
6955 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_hal_tim.c6940 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
6950 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
6957 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
6961 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
6966 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
6969 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
6974 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_hal_tim.c6782 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
6792 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
6799 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
6803 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
6808 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
6811 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
6816 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_hal_tim.c6948 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
6958 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
6965 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
6969 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
6974 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
6977 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
6982 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_hal_tim.c6970 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
6980 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
6987 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
6991 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
6996 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
6999 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
7004 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_tim.c6941 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
6951 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
6958 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
6962 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
6967 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
6970 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
6975 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_tim.c6930 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
6940 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
6947 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
6951 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
6956 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
6959 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
6964 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_tim.c6776 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
6786 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
6793 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
6797 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
6802 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
6805 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
6810 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32f7xx/drivers/src/
Dstm32f7xx_hal_tim.c6936 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
6946 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
6953 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
6957 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
6962 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
6965 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
6970 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_tim.c7253 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
7263 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
7270 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
7274 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
7279 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
7282 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
7287 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_tim.c7301 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
7311 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
7318 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
7322 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
7327 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
7330 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
7335 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_tim.c7106 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) in TIM_Base_SetConfig() argument
7116 tmpcr1 |= Structure->CounterMode; in TIM_Base_SetConfig()
7123 tmpcr1 |= (uint32_t)Structure->ClockDivision; in TIM_Base_SetConfig()
7127 MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); in TIM_Base_SetConfig()
7132 TIMx->ARR = (uint32_t)Structure->Period ; in TIM_Base_SetConfig()
7135 TIMx->PSC = Structure->Prescaler; in TIM_Base_SetConfig()
7140 TIMx->RCR = Structure->RepetitionCounter; in TIM_Base_SetConfig()
/hal_stm32-3.4.0/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_hal_tim.h2124 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure);
/hal_stm32-3.4.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_hal_tim.h2094 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure);
/hal_stm32-3.4.0/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_tim.h2182 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure);
/hal_stm32-3.4.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_tim.h2113 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure);
/hal_stm32-3.4.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_tim.h2094 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure);
/hal_stm32-3.4.0/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_hal_tim.h2389 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure);

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