| /hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/ |
| D | efr32fg1p_cmu.h | 1695 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
1700 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/ |
| D | efm32pg1b_cmu.h | 1695 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
1700 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/ |
| D | efr32mg12p_cmu.h | 1916 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
1921 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/ |
| D | efm32jg12b_cmu.h | 1916 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
1921 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/ |
| D | efm32pg12b_cmu.h | 1916 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
1921 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/ |
| D | efr32fg13p_cmu.h | 1970 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
1975 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/ |
| D | efr32bg13p_cmu.h | 1970 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
1975 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| D | efr32bg13p732f512gm32.h | 4120 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
4125 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| D | efr32bg13p732f512gm48.h | 4120 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
4125 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| D | efr32bg13p733f512gm48.h | 4120 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
4125 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| D | efr32bg13p532f512gm48.h | 4120 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
4125 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| D | efr32bg13p632f512gm32.h | 4120 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
4125 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| D | efr32bg13p632f512gm48.h | 4120 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
4125 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| D | efr32bg13p632f512im32.h | 4120 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
4125 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| D | efr32bg13p632f512im48.h | 4120 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
4125 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| D | efr32bg13p532f512gm32.h | 4120 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL /… macro
4125 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) /…
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/ |
| D | efm32gg12b_cmu.h | 2376 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL … macro
2381 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) …
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| D | efm32gg12b390f1024gl112.h | 6192 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL … macro
6197 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) …
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| D | efm32gg12b390f512gl112.h | 6192 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL … macro
6197 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) …
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| D | efm32gg12b530f512il120.h | 7021 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL … macro
7026 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) …
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| /hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/ |
| D | efm32gg11b_cmu.h | 2443 #define _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK 0x00000003UL … macro
2448 #define CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << 4) …
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| /hal_silabs-latest/simplicity_sdk/platform/emlib/inc/ |
| D | sli_em_cmu.h | 1735 | (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << _CMU_ADCCTRL_ADC0CLKSEL_SHIFT); \
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| /hal_silabs-latest/gecko/emlib/inc/ |
| D | sli_em_cmu.h | 1732 | (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK << _CMU_ADCCTRL_ADC0CLKSEL_SHIFT); \
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| /hal_silabs-latest/simplicity_sdk/platform/emlib/src/ |
| D | em_cmu.c | 5854 #if defined (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK) \
9926 tmp = _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK; in CMU_ClockSelectSet()
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| /hal_silabs-latest/gecko/emlib/src/ |
| D | em_cmu.c | 5801 #if defined (_CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK) \
9873 tmp = _CMU_ADCCTRL_ADC0CLKSEL_HFSRCCLK; in CMU_ClockSelectSet()
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