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Searched refs:_CMU_ADCCTRL_ADC0CLKSEL_DISABLED (Results 1 – 25 of 84) sorted by relevance

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/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG1P/Include/
Defr32fg1p_cmu.h1692 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
1697 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG1B/Include/
Defm32pg1b_cmu.h1692 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
1697 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32MG12P/Include/
Defr32mg12p_cmu.h1913 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
1918 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32JG12B/Include/
Defm32jg12b_cmu.h1913 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
1918 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32PG12B/Include/
Defm32pg12b_cmu.h1913 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
1918 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32FG13P/Include/
Defr32fg13p_cmu.h1967 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
1972 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFR32BG13P/Include/
Defr32bg13p_cmu.h1967 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
1972 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
Defr32bg13p732f512gm32.h4117 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
4122 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
Defr32bg13p732f512gm48.h4117 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
4122 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
Defr32bg13p733f512gm48.h4117 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
4122 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
Defr32bg13p532f512gm48.h4117 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
4122 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
Defr32bg13p632f512gm32.h4117 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
4122 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
Defr32bg13p632f512gm48.h4117 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
4122 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
Defr32bg13p632f512im32.h4117 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
4122 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
Defr32bg13p632f512im48.h4117 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
4122 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
Defr32bg13p532f512gm32.h4117 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL /… macro
4122 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) /…
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG12B/Include/
Defm32gg12b_cmu.h2373 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL … macro
2378 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) …
Defm32gg12b390f1024gl112.h6189 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL … macro
6194 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) …
Defm32gg12b390f512gl112.h6189 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL … macro
6194 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) …
Defm32gg12b530f512il120.h7018 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL … macro
7023 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) …
Defm32gg12b530f512im64.h7018 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL … macro
7023 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) …
Defm32gg12b530f512iq100.h7018 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL … macro
7023 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) …
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32GG11B/Include/
Defm32gg11b_cmu.h2440 #define _CMU_ADCCTRL_ADC0CLKSEL_DISABLED 0x00000000UL … macro
2445 #define CMU_ADCCTRL_ADC0CLKSEL_DISABLED (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << 4) …
/hal_silabs-latest/simplicity_sdk/platform/emlib/inc/
Dsli_em_cmu.h1715 | (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << _CMU_ADCCTRL_ADC0CLKSEL_SHIFT); \
/hal_silabs-latest/gecko/emlib/inc/
Dsli_em_cmu.h1712 | (_CMU_ADCCTRL_ADC0CLKSEL_DISABLED << _CMU_ADCCTRL_ADC0CLKSEL_SHIFT); \

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