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Searched refs:CLKDIV (Results 1 – 25 of 91) sorted by relevance

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/hal_silabs-latest/si32/si32Hal/SI32_Modules/
DSI32_TIMER_A_Type.c51 basePointer->CLKDIV.U32 = clkdiv; in _SI32_TIMER_A_initialize()
957 basePointer->CLKDIV.U32 = clkdiv; in _SI32_TIMER_A_write_clkdiv()
971 return basePointer->CLKDIV.U32; in _SI32_TIMER_A_read_clkdiv()
986 basePointer->CLKDIV.CLKDIVCT = counter; in _SI32_TIMER_A_set_clock_divider_counter()
1001 basePointer->CLKDIV.CLKDIVRL = reload; in _SI32_TIMER_A_set_clock_divider_reload()
DSI32_TIMER_A_Type.h82 basePointer->CLKDIV.U32 = clkdiv;\
1039 (basePointer->CLKDIV.U32 = clkdiv)
1055 (basePointer->CLKDIV.U32)
1074 (basePointer->CLKDIV.CLKDIVCT = counter)
1093 (basePointer->CLKDIV.CLKDIVRL = reload)
DSI32_UART_B_Type.c66 basePointer->CLKDIV.U32 = clkdiv; in _SI32_UART_B_initialize()
2008 basePointer->CLKDIV.U32 = clkdiv; in _SI32_UART_B_write_clkdiv()
2022 return basePointer->CLKDIV.U32; in _SI32_UART_B_read_clkdiv()
2035 basePointer->CLKDIV.CLKDIV_BITS = SI32_UART_B_CLKDIV_CLKDIV_DIV1_VALUE; in _SI32_UART_B_select_clock_source_apb_div1()
2048 basePointer->CLKDIV.CLKDIV_BITS = SI32_UART_B_CLKDIV_CLKDIV_DIV2_VALUE; in _SI32_UART_B_select_clock_source_apb_div2()
2061 basePointer->CLKDIV.CLKDIV_BITS = SI32_UART_B_CLKDIV_CLKDIV_DIV4_VALUE; in _SI32_UART_B_select_clock_source_apb_div4()
DSI32_UART_B_Type.h2215 (basePointer->CLKDIV.U32 = clkdiv)
2231 (basePointer->CLKDIV.U32)
2244 (basePointer->CLKDIV.CLKDIV_BITS = SI32_UART_B_CLKDIV_CLKDIV_DIV1_VALUE)
2257 (basePointer->CLKDIV.CLKDIV_BITS = SI32_UART_B_CLKDIV_CLKDIV_DIV2_VALUE)
2270 (basePointer->CLKDIV.CLKDIV_BITS = SI32_UART_B_CLKDIV_CLKDIV_DIV4_VALUE)
DSI32_USB_A_Type.c1797 basePointer->CLKSEL.CLKDIV = SI32_USB_A_CLKSEL_CLKDIV_DIV1_VALUE; in _SI32_USB_A_select_clock_divider_1()
1810 basePointer->CLKSEL.CLKDIV = SI32_USB_A_CLKSEL_CLKDIV_DIV2_VALUE; in _SI32_USB_A_select_clock_divider_2()
1823 basePointer->CLKSEL.CLKDIV = SI32_USB_A_CLKSEL_CLKDIV_DIV4_VALUE; in _SI32_USB_A_select_clock_divider_4()
1836 basePointer->CLKSEL.CLKDIV = SI32_USB_A_CLKSEL_CLKDIV_DIV8_VALUE; in _SI32_USB_A_select_clock_divider_8()
DSI32_USB_A_Type.h1972 (basePointer->CLKSEL.CLKDIV = SI32_USB_A_CLKSEL_CLKDIV_DIV1_VALUE)
1985 (basePointer->CLKSEL.CLKDIV = SI32_USB_A_CLKSEL_CLKDIV_DIV2_VALUE)
1998 (basePointer->CLKSEL.CLKDIV = SI32_USB_A_CLKSEL_CLKDIV_DIV4_VALUE)
2011 (basePointer->CLKSEL.CLKDIV = SI32_USB_A_CLKSEL_CLKDIV_DIV8_VALUE)
DSI32_PCA_A_Registers.h42 volatile uint32_t CLKDIV: 10; member
DSI32_PCA_A_Type.h153 (basePointer->MODE.CLKDIV = divisor)
DSI32_PCA_A_Type.c99 basePointer->MODE.CLKDIV = divisor; in _SI32_PCA_A_select_input_clock_divisor()
DSI32_DCDC_A_Registers.h55 volatile uint32_t CLKDIV: 3; member
DSI32_TIMER_A_Registers.h488 struct SI32_TIMER_A_CLKDIV_Struct CLKDIV ; // Base Address + 0x10 member
DSI32_SPI_A_Registers.h571 volatile uint16_t CLKDIV; member
DSI32_SPI_B_Registers.h570 volatile uint16_t CLKDIV; member
DSI32_EPCA_A_Registers.h42 volatile uint32_t CLKDIV: 10; member
DSI32_SPI_A_Type.c1352 basePointer->CLKRATE.CLKDIV = ((divisor/2)-1); in _SI32_SPI_A_set_clock_divisor()
DSI32_SPI_A_Type.h1480 (basePointer->CLKRATE.CLKDIV = ((divisor/2)-1))
/hal_silabs-latest/gecko/emlib/src/
Dem_leuart.c223 return LEUART_BaudrateCalc(freq, leuart->CLKDIV); in LEUART_BaudrateGet()
315 leuart->CLKDIV = clkdiv; in LEUART_BaudrateSet()
487 leuart->CLKDIV = _LEUART_CLKDIV_RESETVALUE; in LEUART_Reset()
Dem_usart.c423 usart->CLKDIV = clkdiv; in USART_BaudrateAsyncSet()
613 return USART_BaudrateCalc(freq, usart->CLKDIV, syncmode, ovs); in USART_BaudrateGet()
693 usart->CLKDIV = clkdiv; in USART_BaudrateSyncSet()
1105 usart->CLKDIV = _USART_CLKDIV_RESETVALUE; in USART_Reset()
1128 usart->CLKDIV = _USART_CLKDIV_RESETVALUE; in USART_Reset()
Dem_i2c.c228 return freqHfper / ((n * (i2c->CLKDIV + 1)) + I2C_CR_MAX); in I2C_BusFreqGet()
387 i2c->CLKDIV = (uint32_t)div; in I2C_BusFreqSet()
455 i2c->CLKDIV = _I2C_CLKDIV_RESETVALUE; in I2C_Reset()
Dem_eusart.c347 eusart->CLKDIV = _EUSART_CLKDIV_RESETVALUE; in EUSART_Reset()
684 eusart->CLKDIV = clkdiv; in EUSART_BaudrateSet()
715 div = eusart->CLKDIV; in EUSART_BaudrateGet()
1375 eusart->CLKDIV = eusart->CLKDIV; in EUSART_Disable()
/hal_silabs-latest/simplicity_sdk/platform/emlib/src/
Dem_usart.c423 usart->CLKDIV = clkdiv; in USART_BaudrateAsyncSet()
613 return USART_BaudrateCalc(freq, usart->CLKDIV, syncmode, ovs); in USART_BaudrateGet()
693 usart->CLKDIV = clkdiv; in USART_BaudrateSyncSet()
1105 usart->CLKDIV = _USART_CLKDIV_RESETVALUE; in USART_Reset()
1128 usart->CLKDIV = _USART_CLKDIV_RESETVALUE; in USART_Reset()
Dem_i2c.c228 return freqHfper / ((n * (i2c->CLKDIV + 1)) + I2C_CR_MAX); in I2C_BusFreqGet()
387 i2c->CLKDIV = (uint32_t)div; in I2C_BusFreqSet()
455 i2c->CLKDIV = _I2C_CLKDIV_RESETVALUE; in I2C_Reset()
Dem_eusart.c350 eusart->CLKDIV = _EUSART_CLKDIV_RESETVALUE; in EUSART_Reset()
687 eusart->CLKDIV = clkdiv; in EUSART_BaudrateSet()
718 div = eusart->CLKDIV; in EUSART_BaudrateGet()
1378 eusart->CLKDIV = eusart->CLKDIV; in EUSART_Disable()
/hal_silabs-latest/si32/si32Hal/sim3l1xx/
DSI32_SIM3L1XX_SLEEPCTRL_A_Registers.h44 volatile uint32_t CLKDIV: 2; member
/hal_silabs-latest/gecko/Device/SiliconLabs/EFM32HG/Include/
Defm32hg_leuart.h50 __IOM uint32_t CLKDIV; /**< Clock Control Register */ member

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