| /hal_nxp-latest/mcux/mcux-sdk/drivers/eim/ |
| D | fsl_eim.c | 83 void EIM_InjectCheckBitError(EIM_Type *base, eim_memory_channel_t channel, uint8_t mask) in EIM_InjectCheckBitError() argument
88 base->EICHD0_WORD0 = EIM_EICHD0_WORD0_CHKBIT_MASK(mask); in EIM_InjectCheckBitError()
92 base->EICHD1_WORD0 = EIM_EICHD1_WORD0_CHKBIT_MASK(mask); in EIM_InjectCheckBitError()
98 base->EICHD2_WORD0 = EIM_EICHD2_WORD0_CHKBIT_MASK(mask); in EIM_InjectCheckBitError()
103 base->EICHD3_WORD0 = EIM_EICHD3_WORD0_CHKBIT_MASK(mask); in EIM_InjectCheckBitError()
108 base->EICHD4_WORD0 = EIM_EICHD4_WORD0_CHKBIT_MASK(mask); in EIM_InjectCheckBitError()
113 base->EICHD5_WORD0 = EIM_EICHD5_WORD0_CHKBIT_MASK(mask); in EIM_InjectCheckBitError()
118 base->EICHD6_WORD0 = EIM_EICHD6_WORD0_CHKBIT_MASK(mask); in EIM_InjectCheckBitError()
123 base->EICHD7_WORD0 = EIM_EICHD7_WORD0_CHKBIT_MASK(mask); in EIM_InjectCheckBitError()
128 base->EICHD8_WORD0 = EIM_EICHD8_WORD0_CHKBIT_MASK(mask); in EIM_InjectCheckBitError()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/gpio/ |
| D | fsl_gpio.h | 197 static inline void GPIO_SecurePrivilegeLock(GPIO_Type *base, gpio_pin_interrupt_control_t mask) in GPIO_SecurePrivilegeLock() argument
199 base->LOCK |= GPIO_FIT_REG(mask); in GPIO_SecurePrivilegeLock()
208 static inline void GPIO_EnablePinControlNonSecure(GPIO_Type *base, uint32_t mask) in GPIO_EnablePinControlNonSecure() argument
210 base->PCNS |= GPIO_FIT_REG(mask); in GPIO_EnablePinControlNonSecure()
219 static inline void GPIO_DisablePinControlNonSecure(GPIO_Type *base, uint32_t mask) in GPIO_DisablePinControlNonSecure() argument
221 base->PCNS &= GPIO_FIT_REG(~mask); in GPIO_DisablePinControlNonSecure()
230 static inline void GPIO_EnablePinControlNonPrivilege(GPIO_Type *base, uint32_t mask) in GPIO_EnablePinControlNonPrivilege() argument
232 base->PCNP |= GPIO_FIT_REG(mask); in GPIO_EnablePinControlNonPrivilege()
241 static inline void GPIO_DisablePinControlNonPrivilege(GPIO_Type *base, uint32_t mask) in GPIO_DisablePinControlNonPrivilege() argument
243 base->PCNP &= GPIO_FIT_REG(~mask); in GPIO_DisablePinControlNonPrivilege()
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| /hal_nxp-latest/s32/drivers/s32ze/BaseNXP/include/ |
| D | RegLockMacros.h | 97 #define RLM_REG_BIT_CLEAR8(address, mask) ((*(volatile uint8*)(address))&= (~(mask))) argument
101 #define RLM_REG_BIT_CLEAR16(address, mask) ((*(volatile uint16*)(address))&= (~(mask))) argument
105 #define RLM_REG_BIT_CLEAR32(address, mask) ((*(volatile uint32*)(address))&= (~(mask))) argument
111 #define RLM_REG_BIT_GET8(address, mask) ((*(volatile uint8*)(address))& (mask)) argument
115 #define RLM_REG_BIT_GET16(address, mask) ((*(volatile uint16*)(address))& (mask)) argument
119 #define RLM_REG_BIT_GET32(address, mask) ((*(volatile uint32*)(address))& (mask)) argument
125 #define RLM_REG_BIT_SET8(address, mask) ((*(volatile uint8*)(address))|= (mask)) argument
129 #define RLM_REG_BIT_SET16(address, mask) ((*(volatile uint16*)(address))|= (mask)) argument
133 #define RLM_REG_BIT_SET32(address, mask) ((*(volatile uint32*)(address))|= (mask)) argument
141 #define RLM_REG_RMW8(address, mask, value) (RLM_REG_WRITE8((address), ((RLM_REG_READ8(address)& … argument
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| /hal_nxp-latest/s32/drivers/s32k3/BaseNXP/include/ |
| D | RegLockMacros.h | 97 #define RLM_REG_BIT_CLEAR8(address, mask) ((*(volatile uint8*)(address))&= (~(mask))) argument
101 #define RLM_REG_BIT_CLEAR16(address, mask) ((*(volatile uint16*)(address))&= (~(mask))) argument
105 #define RLM_REG_BIT_CLEAR32(address, mask) ((*(volatile uint32*)(address))&= (~(mask))) argument
111 #define RLM_REG_BIT_GET8(address, mask) ((*(volatile uint8*)(address))& (mask)) argument
115 #define RLM_REG_BIT_GET16(address, mask) ((*(volatile uint16*)(address))& (mask)) argument
119 #define RLM_REG_BIT_GET32(address, mask) ((*(volatile uint32*)(address))& (mask)) argument
125 #define RLM_REG_BIT_SET8(address, mask) ((*(volatile uint8*)(address))|= (mask)) argument
129 #define RLM_REG_BIT_SET16(address, mask) ((*(volatile uint16*)(address))|= (mask)) argument
133 #define RLM_REG_BIT_SET32(address, mask) ((*(volatile uint32*)(address))|= (mask)) argument
141 #define RLM_REG_RMW8(address, mask, value) (RLM_REG_WRITE8((address), ((RLM_REG_READ8(address)& … argument
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| /hal_nxp-latest/s32/drivers/s32k1/BaseNXP/include/ |
| D | RegLockMacros.h | 96 #define RLM_REG_BIT_CLEAR8(address, mask) ((*(volatile uint8*)(address))&= (~(mask))) argument
100 #define RLM_REG_BIT_CLEAR16(address, mask) ((*(volatile uint16*)(address))&= (~(mask))) argument
104 #define RLM_REG_BIT_CLEAR32(address, mask) ((*(volatile uint32*)(address))&= (~(mask))) argument
110 #define RLM_REG_BIT_GET8(address, mask) ((*(volatile uint8*)(address))& (mask)) argument
114 #define RLM_REG_BIT_GET16(address, mask) ((*(volatile uint16*)(address))& (mask)) argument
118 #define RLM_REG_BIT_GET32(address, mask) ((*(volatile uint32*)(address))& (mask)) argument
124 #define RLM_REG_BIT_SET8(address, mask) ((*(volatile uint8*)(address))|= (mask)) argument
128 #define RLM_REG_BIT_SET16(address, mask) ((*(volatile uint16*)(address))|= (mask)) argument
132 #define RLM_REG_BIT_SET32(address, mask) ((*(volatile uint32*)(address))|= (mask)) argument
140 #define RLM_REG_RMW8(address, mask, value) (RLM_REG_WRITE8((address), ((RLM_REG_READ8(address)& … argument
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/rgpio/ |
| D | fsl_rgpio.h | 199 static inline void RGPIO_PortSet(RGPIO_Type *base, uint32_t mask) in RGPIO_PortSet() argument
201 base->PSOR = mask; in RGPIO_PortSet()
208 static inline void RGPIO_SetPinsOutput(RGPIO_Type *base, uint32_t mask) in RGPIO_SetPinsOutput() argument
210 RGPIO_PortSet(base, mask); in RGPIO_SetPinsOutput()
219 static inline void RGPIO_PortClear(RGPIO_Type *base, uint32_t mask) in RGPIO_PortClear() argument
221 base->PCOR = mask; in RGPIO_PortClear()
231 static inline void RGPIO_ClearPinsOutput(RGPIO_Type *base, uint32_t mask) in RGPIO_ClearPinsOutput() argument
233 RGPIO_PortClear(base, mask); in RGPIO_ClearPinsOutput()
242 static inline void RGPIO_PortToggle(RGPIO_Type *base, uint32_t mask) in RGPIO_PortToggle() argument
244 base->PTOR = mask; in RGPIO_PortToggle()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/tdet/ |
| D | fsl_tdet.c | 47 static bool tdet_IsRegisterWriteAllowed(DIGTMP_Type *base, uint32_t mask) in tdet_IsRegisterWriteAllowed() argument
52 mask = mask & TDET_ALL_LC_MASK; in tdet_IsRegisterWriteAllowed()
55 if (mask == (mask & base->LR)) in tdet_IsRegisterWriteAllowed()
65 uint32_t mask; in tdet_PinConfigure() local
73 mask = ((uint32_t)1u << pin); in tdet_PinConfigure()
77 temp &= ~mask; /* clear the bit */ in tdet_PinConfigure()
80 temp |= mask; /* set the bit, if configured */ in tdet_PinConfigure()
86 temp &= ~mask; /* clear the bit */ in tdet_PinConfigure()
89 temp |= mask; /* set the bit, if configured */ in tdet_PinConfigure()
308 uint32_t mask; in TDET_ActiveTamperSetConfig() local
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/igpio/ |
| D | fsl_gpio.h | 112 static inline void GPIO_PortSet(GPIO_Type *base, uint32_t mask) in GPIO_PortSet() argument
115 base->DR_SET = mask; in GPIO_PortSet()
117 base->DR |= mask; in GPIO_PortSet()
125 static inline void GPIO_SetPinsOutput(GPIO_Type *base, uint32_t mask) in GPIO_SetPinsOutput() argument
127 GPIO_PortSet(base, mask); in GPIO_SetPinsOutput()
136 static inline void GPIO_PortClear(GPIO_Type *base, uint32_t mask) in GPIO_PortClear() argument
139 base->DR_CLEAR = mask; in GPIO_PortClear()
141 base->DR &= ~mask; in GPIO_PortClear()
149 static inline void GPIO_ClearPinsOutput(GPIO_Type *base, uint32_t mask) in GPIO_ClearPinsOutput() argument
151 GPIO_PortClear(base, mask); in GPIO_ClearPinsOutput()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/iuart/ |
| D | fsl_uart.c | 474 void UART_EnableInterrupts(UART_Type *base, uint32_t mask) in UART_EnableInterrupts() argument
476 assert((0x7F3FF73FU & mask) != 0U); in UART_EnableInterrupts()
478 if ((0X3FU & mask) != 0U) in UART_EnableInterrupts()
480 base->UCR1 |= ((mask << UART_UCR1_ADEN_SHIFT) & UART_UCR1_ADEN_MASK) | in UART_EnableInterrupts()
481 (((mask >> 1) << UART_UCR1_TRDYEN_SHIFT) & UART_UCR1_TRDYEN_MASK) | in UART_EnableInterrupts()
482 (((mask >> 2) << UART_UCR1_IDEN_SHIFT) & UART_UCR1_IDEN_MASK) | in UART_EnableInterrupts()
483 (((mask >> 3) << UART_UCR1_RRDYEN_SHIFT) & UART_UCR1_RRDYEN_MASK) | in UART_EnableInterrupts()
484 (((mask >> 4) << UART_UCR1_TXMPTYEN_SHIFT) & UART_UCR1_TXMPTYEN_MASK) | in UART_EnableInterrupts()
485 (((mask >> 5) << UART_UCR1_RTSDEN_SHIFT) & UART_UCR1_RTSDEN_MASK); in UART_EnableInterrupts()
487 if ((0X700U & mask) != 0U) in UART_EnableInterrupts()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/flexio/ |
| D | fsl_flexio.h | 557 static inline void FLEXIO_EnableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask) in FLEXIO_EnableShifterStatusInterrupts() argument
559 base->SHIFTSIEN |= mask; in FLEXIO_EnableShifterStatusInterrupts()
570 static inline void FLEXIO_DisableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask) in FLEXIO_DisableShifterStatusInterrupts() argument
572 base->SHIFTSIEN &= ~mask; in FLEXIO_DisableShifterStatusInterrupts()
583 static inline void FLEXIO_EnableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask) in FLEXIO_EnableShifterErrorInterrupts() argument
585 base->SHIFTEIEN |= mask; in FLEXIO_EnableShifterErrorInterrupts()
596 static inline void FLEXIO_DisableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask) in FLEXIO_DisableShifterErrorInterrupts() argument
598 base->SHIFTEIEN &= ~mask; in FLEXIO_DisableShifterErrorInterrupts()
609 static inline void FLEXIO_EnableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask) in FLEXIO_EnableTimerStatusInterrupts() argument
611 base->TIMIEN |= mask; in FLEXIO_EnableTimerStatusInterrupts()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/rtc/ |
| D | fsl_rtc.c | 405 void RTC_EnableInterrupts(RTC_Type *base, uint32_t mask) in RTC_EnableInterrupts() argument
410 if (0U != ((uint32_t)kRTC_TimeInvalidInterruptEnable & mask)) in RTC_EnableInterrupts()
414 if (0U != ((uint32_t)kRTC_TimeOverflowInterruptEnable & mask)) in RTC_EnableInterrupts()
418 if (0U != ((uint32_t)kRTC_AlarmInterruptEnable & mask)) in RTC_EnableInterrupts()
422 if (0U != ((uint32_t)kRTC_SecondsInterruptEnable & mask)) in RTC_EnableInterrupts()
427 if (0U != ((uint32_t)kRTC_MonotonicOverflowInterruptEnable & mask)) in RTC_EnableInterrupts()
438 if (0U != ((uint32_t)kRTC_TestModeInterruptEnable & mask)) in RTC_EnableInterrupts()
442 if (0U != ((uint32_t)kRTC_FlashSecurityInterruptEnable & mask)) in RTC_EnableInterrupts()
447 if (0U != ((uint32_t)kRTC_TamperPinInterruptEnable & mask)) in RTC_EnableInterrupts()
453 if (0U != ((uint32_t)kRTC_SecurityModuleInterruptEnable & mask)) in RTC_EnableInterrupts()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/flexcan/ |
| D | fsl_flexcan.h | 1299 void FLEXCAN_SetRxMbGlobalMask(CAN_Type *base, uint32_t mask);
1309 void FLEXCAN_SetRxFifoGlobalMask(CAN_Type *base, uint32_t mask);
1325 void FLEXCAN_SetRxIndividualMask(CAN_Type *base, uint8_t maskIdx, uint32_t mask);
1488 static inline void FLEXCAN_ClearStatusFlags(CAN_Type *base, uint64_t mask) in FLEXCAN_ClearStatusFlags() argument
1492 base->WU_MTC = FLEXCAN_PN_STATUS_UNMASK(mask); in FLEXCAN_ClearStatusFlags()
1496 base->ERFSR = FLEXCAN_EFIFO_STATUS_UNMASK(mask); in FLEXCAN_ClearStatusFlags()
1500 base->ERRSR = FLEXCAN_MECR_STATUS_UNMASK(mask); in FLEXCAN_ClearStatusFlags()
1502 base->ESR1 = (uint32_t)(mask & 0xFFFFFFFFU); in FLEXCAN_ClearStatusFlags()
1505 static inline void FLEXCAN_ClearStatusFlags(CAN_Type *base, uint32_t mask) in FLEXCAN_ClearStatusFlags() argument
1508 base->ESR1 = mask; in FLEXCAN_ClearStatusFlags()
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| /hal_nxp-latest/s32/drivers/s32ze/Can_CANEXCEL/src/ |
| D | CanEXCEL_Ip_HwAccess.c | 706 uint32 mask = 1UL << (filtIdx%32U); in CanXL_ConfigAccAddr() local
710 base->AAMRCFG |= mask; in CanXL_ConfigAccAddr()
714 base->AAMRCFG &= (~mask); in CanXL_ConfigAccAddr()
726 uint32 mask = 1UL << (filtIdx%32U); in CanXL_ConfigIDFilter() local
730 base->ACPTIDMR |= mask; in CanXL_ConfigIDFilter()
734 base->ACPTIDMR &= (~mask); in CanXL_ConfigIDFilter()
746 uint32 mask = 1UL << (filtIdx%32U); in CanXL_ConfigSDUFilter() local
750 base->SAMRCFG |= mask; in CanXL_ConfigSDUFilter()
754 base->SAMRCFG &= (~mask); in CanXL_ConfigSDUFilter()
774 uint32 mask = 1UL << (filtIdx%32U); in CanXL_ConfigVCANFilter() local
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/sdu/ |
| D | cis_table.c | 192 uint32_t mask; in modify() local
195 mask = (uint32_t)((1U << masklen) - 1U); // Now as a mask in modify()
196 val &= mask; // mask unshifted val in modify()
198 mask <<= lo; // mask moves too to field off in modify()
199 tmp &= ~mask; // Clear R[hi:lo] in modify()
204 static uint32_t modify2(uint32_t tmp, uint32_t mask, uint32_t shift, uint32_t val) in modify2() argument
206 mask >>= shift; in modify2()
207 val &= mask; // mask unshifted val in modify2()
209 mask <<= shift; // mask moves too to field off in modify2()
210 tmp &= ~mask; // Clear R[hi:lo] in modify2()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/qdc/ |
| D | fsl_qdc.c | 395 void QDC_ClearStatusFlags(QDC_Type *base, uint32_t mask) in QDC_ClearStatusFlags() argument
400 if (0U != ((uint32_t)kQDC_HOMETransitionFlag & mask)) in QDC_ClearStatusFlags()
404 if (0U != ((uint32_t)kQDC_INDEXPulseFlag & mask)) in QDC_ClearStatusFlags()
408 if (0U != ((uint32_t)kQDC_WatchdogTimeoutFlag & mask)) in QDC_ClearStatusFlags()
412 if (0U != ((uint32_t)kQDC_PositionCompareFlag & mask)) in QDC_ClearStatusFlags()
424 if (0U != ((uint32_t)kQDC_SimultBothPhaseChangeFlag & mask)) in QDC_ClearStatusFlags()
429 if (0U != ((uint32_t)kQDC_PositionRollOverFlag & mask)) in QDC_ClearStatusFlags()
433 if (0U != ((uint32_t)kQDC_PositionRollUnderFlag & mask)) in QDC_ClearStatusFlags()
449 void QDC_EnableInterrupts(QDC_Type *base, uint32_t mask) in QDC_EnableInterrupts() argument
454 if (0U != ((uint32_t)kQDC_HOMETransitionInterruptEnable & mask)) in QDC_EnableInterrupts()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/enc/ |
| D | fsl_enc.c | 396 void ENC_ClearStatusFlags(ENC_Type *base, uint32_t mask) in ENC_ClearStatusFlags() argument
401 if (0U != ((uint32_t)kENC_HOMETransitionFlag & mask)) in ENC_ClearStatusFlags()
405 if (0U != ((uint32_t)kENC_INDEXPulseFlag & mask)) in ENC_ClearStatusFlags()
409 if (0U != ((uint32_t)kENC_WatchdogTimeoutFlag & mask)) in ENC_ClearStatusFlags()
413 if (0U != ((uint32_t)kENC_PositionCompareFlag & mask)) in ENC_ClearStatusFlags()
425 if (0U != ((uint32_t)kENC_SimultBothPhaseChangeFlag & mask)) in ENC_ClearStatusFlags()
430 if (0U != ((uint32_t)kENC_PositionRollOverFlag & mask)) in ENC_ClearStatusFlags()
434 if (0U != ((uint32_t)kENC_PositionRollUnderFlag & mask)) in ENC_ClearStatusFlags()
450 void ENC_EnableInterrupts(ENC_Type *base, uint32_t mask) in ENC_EnableInterrupts() argument
455 if (0U != ((uint32_t)kENC_HOMETransitionInterruptEnable & mask)) in ENC_EnableInterrupts()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/qtmr_1/ |
| D | fsl_qtmr.c | 318 void QTMR_EnableInterrupts(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask) in QTMR_EnableInterrupts() argument
324 if ((mask & (uint16_t)kQTMR_CompareInterruptEnable) != 0UL) in QTMR_EnableInterrupts()
329 if ((mask & (uint16_t)kQTMR_OverflowInterruptEnable) != 0UL) in QTMR_EnableInterrupts()
334 if ((mask & (uint16_t)kQTMR_EdgeInterruptEnable) != 0UL) in QTMR_EnableInterrupts()
344 if ((mask & (uint16_t)kQTMR_Compare1InterruptEnable) != 0UL) in QTMR_EnableInterrupts()
349 if ((mask & (uint16_t)kQTMR_Compare2InterruptEnable) != 0UL) in QTMR_EnableInterrupts()
364 void QTMR_DisableInterrupts(TMR_Type *base, qtmr_channel_selection_t channel, uint32_t mask) in QTMR_DisableInterrupts() argument
370 if ((mask & (uint16_t)kQTMR_CompareInterruptEnable) != 0UL) in QTMR_DisableInterrupts()
375 if ((mask & (uint16_t)kQTMR_OverflowInterruptEnable) != 0UL) in QTMR_DisableInterrupts()
380 if ((mask & (uint16_t)kQTMR_EdgeInterruptEnable) != 0UL) in QTMR_DisableInterrupts()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/eeprom/ |
| D | fsl_eeprom.h | 138 static inline void EEPROM_EnableInterrupt(EEPROM_Type *base, uint32_t mask) in EEPROM_EnableInterrupt() argument
140 base->INTENSET = mask; in EEPROM_EnableInterrupt()
150 static inline void EEPROM_DisableInterrupt(EEPROM_Type *base, uint32_t mask) in EEPROM_DisableInterrupt() argument
152 base->INTENCLR = mask; in EEPROM_DisableInterrupt()
175 static inline void EEPROM_ClearInterruptFlag(EEPROM_Type *base, uint32_t mask) in EEPROM_ClearInterruptFlag() argument
177 base->INTSTATCLR = mask; in EEPROM_ClearInterruptFlag()
201 static inline void EEPROM_SetInterruptFlag(EEPROM_Type *base, uint32_t mask) in EEPROM_SetInterruptFlag() argument
203 base->INTSTATSET = mask; in EEPROM_SetInterruptFlag()
266 static inline void EEPROM_SetEccErrorCount(EEPROM_Type *base, uint32_t mask) in EEPROM_SetEccErrorCount() argument
268 base->ECCERRCNT = mask; in EEPROM_SetEccErrorCount()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/qtmr_2/ |
| D | fsl_qtmr.c | 271 void QTMR_EnableInterrupts(TMR_Type *base, uint32_t mask) in QTMR_EnableInterrupts() argument
277 if (0U != (mask & (uint32_t)kQTMR_CompareInterruptEnable)) in QTMR_EnableInterrupts()
282 if (0U != (mask & (uint32_t)kQTMR_OverflowInterruptEnable)) in QTMR_EnableInterrupts()
287 if (0U != (mask & (uint32_t)kQTMR_EdgeInterruptEnable)) in QTMR_EnableInterrupts()
295 if (0U != (mask & (uint32_t)kQTMR_Compare1InterruptEnable)) in QTMR_EnableInterrupts()
300 if (0U != (mask & (uint32_t)kQTMR_Compare2InterruptEnable)) in QTMR_EnableInterrupts()
314 void QTMR_DisableInterrupts(TMR_Type *base, uint32_t mask) in QTMR_DisableInterrupts() argument
320 if (0U != (mask & (uint32_t)kQTMR_CompareInterruptEnable)) in QTMR_DisableInterrupts()
325 if (0U != (mask & (uint32_t)kQTMR_OverflowInterruptEnable)) in QTMR_DisableInterrupts()
330 if (0U != (mask & (uint32_t)kQTMR_EdgeInterruptEnable)) in QTMR_DisableInterrupts()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/spi/ |
| D | fsl_spi.c | 640 void SPI_EnableInterrupts(SPI_Type *base, uint32_t mask) in SPI_EnableInterrupts() argument
643 if ((mask & (uint32_t)kSPI_RxFullAndModfInterruptEnable) != 0U) in SPI_EnableInterrupts()
649 if ((mask & (uint32_t)kSPI_TxEmptyInterruptEnable) != 0U) in SPI_EnableInterrupts()
655 if ((mask & (uint32_t)kSPI_MatchInterruptEnable) != 0U) in SPI_EnableInterrupts()
665 if ((mask & (uint32_t)kSPI_RxFifoNearFullInterruptEnable) != 0U) in SPI_EnableInterrupts()
671 if ((mask & (uint32_t)kSPI_TxFifoNearEmptyInterruptEnable) != 0U) in SPI_EnableInterrupts()
690 void SPI_DisableInterrupts(SPI_Type *base, uint32_t mask) in SPI_DisableInterrupts() argument
693 if ((mask & (uint32_t)kSPI_RxFullAndModfInterruptEnable) != 0U) in SPI_DisableInterrupts()
699 if ((mask & (uint32_t)kSPI_TxEmptyInterruptEnable) != 0U) in SPI_DisableInterrupts()
705 if ((mask & (uint32_t)kSPI_MatchInterruptEnable) != 0U) in SPI_DisableInterrupts()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/port/ |
| D | fsl_port.h | 389 static inline void PORT_SetMultiplePinsConfig(PORT_Type *base, uint32_t mask, const port_pin_config… in PORT_SetMultiplePinsConfig() argument
395 if (0U != (mask & 0xffffU)) in PORT_SetMultiplePinsConfig()
397 base->GPCLR = ((mask & 0xffffU) << 16) | pcrl; in PORT_SetMultiplePinsConfig()
399 if (0U != (mask >> 16)) in PORT_SetMultiplePinsConfig()
401 base->GPCHR = (mask & 0xffff0000U) | pcrl; in PORT_SetMultiplePinsConfig()
427 static inline void PORT_SetMultipleInterruptPinsConfig(PORT_Type *base, uint32_t mask, port_interru… in PORT_SetMultipleInterruptPinsConfig() argument
431 if (0U != ((uint32_t)mask & 0xffffU)) in PORT_SetMultipleInterruptPinsConfig()
433 base->GICLR = ((uint32_t)config << 16U) | ((uint32_t)mask & 0xffffU); in PORT_SetMultipleInterruptPinsConfig()
435 mask = mask >> 16; in PORT_SetMultipleInterruptPinsConfig()
436 if (0U != mask) in PORT_SetMultipleInterruptPinsConfig()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/rtd_cmc/ |
| D | fsl_rtd_cmc.h | 328 static inline void RTDCMC_ClearStickySystemResetStatus(CMC_Type *base, uint32_t mask)
330 base->SSRS = mask;
399 static inline void RTDCMC_EnableSystemResetInterrupt(CMC_Type *base, uint32_t mask)
401 base->SRIE |= mask;
412 static inline void RTDCMC_DisableSystemResetInterrupt(CMC_Type *base, uint32_t mask)
414 base->SRIE &= (uint32_t)(~mask);
441 static inline void RTDCMC_ClearSystemResetInterruptFlags(CMC_Type *base, uint32_t mask)
443 base->SRIF = mask;
460 static inline void RTDCMC_EnablePowerSwitchDomainOutOfResetInterrupt(CMC_Type *base, uint32_t mask)
462 base->RTD_PSDORIE |= mask;
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/hsadc/ |
| D | fsl_hsadc.c | 479 void HSADC_EnableInterrupts(HSADC_Type *base, uint16_t mask) in HSADC_EnableInterrupts() argument
485 …nt16_t)kHSADC_ZeroCrossingInterruptEnable == ((uint16_t)kHSADC_ZeroCrossingInterruptEnable & mask)) in HSADC_EnableInterrupts()
489 …f ((uint16_t)kHSADC_HighLimitInterruptEnable == ((uint16_t)kHSADC_HighLimitInterruptEnable & mask)) in HSADC_EnableInterrupts()
493 … if ((uint16_t)kHSADC_LowLimitInterruptEnable == ((uint16_t)kHSADC_LowLimitInterruptEnable & mask)) in HSADC_EnableInterrupts()
498 ((uint16_t)kHSADC_ConverterAEndOfScanInterruptEnable & mask)) in HSADC_EnableInterrupts()
506 ((uint16_t)kHSADC_ConverterBEndOfScanInterruptEnable & mask)) in HSADC_EnableInterrupts()
514 ((uint16_t)kHSADC_ConverterAEndOfCalibrationInterruptEnable & mask)) in HSADC_EnableInterrupts()
519 ((uint16_t)kHSADC_ConverterBEndOfCalibrationInterruptEnable & mask)) in HSADC_EnableInterrupts()
532 void HSADC_DisableInterrupts(HSADC_Type *base, uint16_t mask) in HSADC_DisableInterrupts() argument
538 …nt16_t)kHSADC_ZeroCrossingInterruptEnable == ((uint16_t)kHSADC_ZeroCrossingInterruptEnable & mask)) in HSADC_DisableInterrupts()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/trng/ |
| D | fsl_trng.c | 209 #define TRNG_RMW_SCML(base, mask, value) (TRNG_WR_SCML(base, (TRNG_RD_SCML(base) & ~(mask)) | (valu… argument
269 #define TRNG_RMW_SCR1L(base, mask, value) (TRNG_WR_SCR1L(base, (TRNG_RD_SCR1L(base) & ~(mask)) | (v… argument
332 #define TRNG_RMW_SCR2L(base, mask, value) (TRNG_WR_SCR2L(base, (TRNG_RD_SCR2L(base) & ~(mask)) | (v… argument
399 #define TRNG_RMW_SCR3L(base, mask, value) (TRNG_WR_SCR3L(base, (TRNG_RD_SCR3L(base) & ~(mask)) | (v… argument
467 #define TRNG_RMW_SCR4L(base, mask, value) (TRNG_WR_SCR4L(base, (TRNG_RD_SCR4L(base) & ~(mask)) | (v… argument
536 #define TRNG_RMW_SCR5L(base, mask, value) (TRNG_WR_SCR5L(base, (TRNG_RD_SCR5L(base) & ~(mask)) | (v… argument
605 #define TRNG_RMW_SCR6PL(base, mask, value) (TRNG_WR_SCR6PL(base, (TRNG_RD_SCR6PL(base) & ~(mask)) |… argument
672 #define TRNG_RMW_PKRMAX(base, mask, value) (TRNG_WR_PKRMAX(base, (TRNG_RD_PKRMAX(base) & ~(mask)) |… argument
722 #define TRNG_RMW_PKRRNG(base, mask, value) (TRNG_WR_PKRRNG(base, (TRNG_RD_PKRRNG(base) & ~(mask)) |… argument
772 #define TRNG_RMW_FRQMAX(base, mask, value) (TRNG_WR_FRQMAX(base, (TRNG_RD_FRQMAX(base) & ~(mask)) |… argument
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/drivers/ |
| D | fsl_gpc.h | 82 #define GPC_STAT(mask, shift) (uint32_t)(((uint32_t)(shift) << 16UL) + ((uint32_t)(mask) >> (uint32… argument
285 static inline void GPC_CM_EnableNonIrqWakeup(gpc_cpu_slice_t slice, uint32_t mask, bool enable) in GPC_CM_EnableNonIrqWakeup() argument
287 assert(mask < 2UL); in GPC_CM_EnableNonIrqWakeup()
291 GPC_CPU_CTRL->AUTHEN[slice].CM_NON_IRQ_WAKEUP_MASK &= ~mask; in GPC_CM_EnableNonIrqWakeup()
295 GPC_CPU_CTRL->AUTHEN[slice].CM_NON_IRQ_WAKEUP_MASK |= mask; in GPC_CM_EnableNonIrqWakeup()
315 static inline bool GPC_CM_GetNonIrqWakeupStatus(gpc_cpu_slice_t slice, uint32_t mask) in GPC_CM_GetNonIrqWakeupStatus() argument
317 return (mask == (GPC_CPU_CTRL->AUTHEN[slice].CM_NON_IRQ_WAKEUP_STAT & mask)); in GPC_CM_GetNonIrqWakeupStatus()
354 static inline bool GPC_CM_GetSystemSleepModeStatus(gpc_cpu_slice_t slice, uint32_t mask) in GPC_CM_GetSystemSleepModeStatus() argument
356 return (mask == (GPC_CPU_CTRL->AUTHEN[slice].CM_SYS_SLEEP_CTRL & mask)); in GPC_CM_GetSystemSleepModeStatus()
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