Lines Matching refs:mask
474 void UART_EnableInterrupts(UART_Type *base, uint32_t mask) in UART_EnableInterrupts() argument
476 assert((0x7F3FF73FU & mask) != 0U); in UART_EnableInterrupts()
478 if ((0X3FU & mask) != 0U) in UART_EnableInterrupts()
480 base->UCR1 |= ((mask << UART_UCR1_ADEN_SHIFT) & UART_UCR1_ADEN_MASK) | in UART_EnableInterrupts()
481 (((mask >> 1) << UART_UCR1_TRDYEN_SHIFT) & UART_UCR1_TRDYEN_MASK) | in UART_EnableInterrupts()
482 (((mask >> 2) << UART_UCR1_IDEN_SHIFT) & UART_UCR1_IDEN_MASK) | in UART_EnableInterrupts()
483 (((mask >> 3) << UART_UCR1_RRDYEN_SHIFT) & UART_UCR1_RRDYEN_MASK) | in UART_EnableInterrupts()
484 (((mask >> 4) << UART_UCR1_TXMPTYEN_SHIFT) & UART_UCR1_TXMPTYEN_MASK) | in UART_EnableInterrupts()
485 (((mask >> 5) << UART_UCR1_RTSDEN_SHIFT) & UART_UCR1_RTSDEN_MASK); in UART_EnableInterrupts()
487 if ((0X700U & mask) != 0U) in UART_EnableInterrupts()
489 base->UCR2 |= (((mask >> 8) << UART_UCR2_ESCI_SHIFT) & UART_UCR2_ESCI_MASK) | in UART_EnableInterrupts()
490 (((mask >> 9) << UART_UCR2_RTSEN_SHIFT) & UART_UCR2_RTSEN_MASK) | in UART_EnableInterrupts()
491 (((mask >> 10) << UART_UCR2_ATEN_SHIFT) & UART_UCR2_ATEN_MASK); in UART_EnableInterrupts()
493 if ((0x3FF000U & mask) != 0U) in UART_EnableInterrupts()
495 base->UCR3 |= (((mask >> 12) << UART_UCR3_DTREN_SHIFT) & UART_UCR3_DTREN_MASK) | in UART_EnableInterrupts()
496 (((mask >> 13) << UART_UCR3_PARERREN_SHIFT) & UART_UCR3_PARERREN_MASK) | in UART_EnableInterrupts()
497 (((mask >> 14) << UART_UCR3_FRAERREN_SHIFT) & UART_UCR3_FRAERREN_MASK) | in UART_EnableInterrupts()
498 (((mask >> 15) << UART_UCR3_DCD_SHIFT) & UART_UCR3_DCD_MASK) | in UART_EnableInterrupts()
499 (((mask >> 16) << UART_UCR3_RI_SHIFT) & UART_UCR3_RI_MASK) | in UART_EnableInterrupts()
500 (((mask >> 17) << UART_UCR3_RXDSEN_SHIFT) & UART_UCR3_RXDSEN_MASK) | in UART_EnableInterrupts()
501 (((mask >> 18) << UART_UCR3_AIRINTEN_SHIFT) & UART_UCR3_AIRINTEN_MASK) | in UART_EnableInterrupts()
502 (((mask >> 19) << UART_UCR3_AWAKEN_SHIFT) & UART_UCR3_AWAKEN_MASK) | in UART_EnableInterrupts()
503 (((mask >> 20) << UART_UCR3_DTRDEN_SHIFT) & UART_UCR3_DTRDEN_MASK) | in UART_EnableInterrupts()
504 (((mask >> 21) << UART_UCR3_ACIEN_SHIFT) & UART_UCR3_ACIEN_MASK); in UART_EnableInterrupts()
506 if ((0x7F000000U & mask) != 0U) in UART_EnableInterrupts()
508 base->UCR4 |= (((mask >> 24) << UART_UCR4_ENIRI_SHIFT) & UART_UCR4_ENIRI_MASK) | in UART_EnableInterrupts()
509 (((mask >> 25) << UART_UCR4_WKEN_SHIFT) & UART_UCR4_WKEN_MASK) | in UART_EnableInterrupts()
510 (((mask >> 26) << UART_UCR4_TCEN_SHIFT) & UART_UCR4_TCEN_MASK) | in UART_EnableInterrupts()
511 (((mask >> 27) << UART_UCR4_BKEN_SHIFT) & UART_UCR4_BKEN_MASK) | in UART_EnableInterrupts()
512 (((mask >> 28) << UART_UCR4_OREN_SHIFT) & UART_UCR4_OREN_MASK) | in UART_EnableInterrupts()
513 (((mask >> 29) << UART_UCR4_DREN_SHIFT) & UART_UCR4_DREN_MASK) | in UART_EnableInterrupts()
514 (((mask >> 30) << UART_UCR4_IDDMAEN_SHIFT) & UART_UCR4_IDDMAEN_MASK); in UART_EnableInterrupts()
531 void UART_DisableInterrupts(UART_Type *base, uint32_t mask) in UART_DisableInterrupts() argument
533 assert((0x7F3FF73FU & mask) != 0U); in UART_DisableInterrupts()
535 if ((0X3FU & mask) != 0U) in UART_DisableInterrupts()
537 base->UCR1 &= ~(((mask << UART_UCR1_ADEN_SHIFT) & UART_UCR1_ADEN_MASK) | in UART_DisableInterrupts()
538 (((mask >> 1) << UART_UCR1_TRDYEN_SHIFT) & UART_UCR1_TRDYEN_MASK) | in UART_DisableInterrupts()
539 (((mask >> 2) << UART_UCR1_IDEN_SHIFT) & UART_UCR1_IDEN_MASK) | in UART_DisableInterrupts()
540 (((mask >> 3) << UART_UCR1_RRDYEN_SHIFT) & UART_UCR1_RRDYEN_MASK) | in UART_DisableInterrupts()
541 (((mask >> 4) << UART_UCR1_TXMPTYEN_SHIFT) & UART_UCR1_TXMPTYEN_MASK) | in UART_DisableInterrupts()
542 (((mask >> 5) << UART_UCR1_RTSDEN_SHIFT) & UART_UCR1_RTSDEN_MASK)); in UART_DisableInterrupts()
544 if ((0X700U & mask) != 0U) in UART_DisableInterrupts()
546 base->UCR2 &= ~((((mask >> 8) << UART_UCR2_ESCI_SHIFT) & UART_UCR2_ESCI_MASK) | in UART_DisableInterrupts()
547 (((mask >> 9) << UART_UCR2_RTSEN_SHIFT) & UART_UCR2_RTSEN_MASK) | in UART_DisableInterrupts()
548 (((mask >> 10) << UART_UCR2_ATEN_SHIFT) & UART_UCR2_ATEN_MASK)); in UART_DisableInterrupts()
550 if ((0x3FF000U & mask) != 0U) in UART_DisableInterrupts()
552 base->UCR3 &= ~((((mask >> 12) << UART_UCR3_DTREN_SHIFT) & UART_UCR3_DTREN_MASK) | in UART_DisableInterrupts()
553 (((mask >> 13) << UART_UCR3_PARERREN_SHIFT) & UART_UCR3_PARERREN_MASK) | in UART_DisableInterrupts()
554 (((mask >> 14) << UART_UCR3_FRAERREN_SHIFT) & UART_UCR3_FRAERREN_MASK) | in UART_DisableInterrupts()
555 (((mask >> 15) << UART_UCR3_DCD_SHIFT) & UART_UCR3_DCD_MASK) | in UART_DisableInterrupts()
556 (((mask >> 16) << UART_UCR3_RI_SHIFT) & UART_UCR3_RI_MASK) | in UART_DisableInterrupts()
557 (((mask >> 17) << UART_UCR3_RXDSEN_SHIFT) & UART_UCR3_RXDSEN_MASK) | in UART_DisableInterrupts()
558 (((mask >> 18) << UART_UCR3_AIRINTEN_SHIFT) & UART_UCR3_AIRINTEN_MASK) | in UART_DisableInterrupts()
559 (((mask >> 19) << UART_UCR3_AWAKEN_SHIFT) & UART_UCR3_AWAKEN_MASK) | in UART_DisableInterrupts()
560 (((mask >> 20) << UART_UCR3_DTRDEN_SHIFT) & UART_UCR3_DTRDEN_MASK) | in UART_DisableInterrupts()
561 (((mask >> 21) << UART_UCR3_ACIEN_SHIFT) & UART_UCR3_ACIEN_MASK)); in UART_DisableInterrupts()
563 if ((0x7F000000U & mask) != 0U) in UART_DisableInterrupts()
565 base->UCR4 &= ~((((mask >> 24) << UART_UCR4_ENIRI_SHIFT) & UART_UCR4_ENIRI_MASK) | in UART_DisableInterrupts()
566 (((mask >> 25) << UART_UCR4_WKEN_SHIFT) & UART_UCR4_WKEN_MASK) | in UART_DisableInterrupts()
567 (((mask >> 26) << UART_UCR4_TCEN_SHIFT) & UART_UCR4_TCEN_MASK) | in UART_DisableInterrupts()
568 (((mask >> 27) << UART_UCR4_BKEN_SHIFT) & UART_UCR4_BKEN_MASK) | in UART_DisableInterrupts()
569 (((mask >> 28) << UART_UCR4_OREN_SHIFT) & UART_UCR4_OREN_MASK) | in UART_DisableInterrupts()
570 (((mask >> 29) << UART_UCR4_DREN_SHIFT) & UART_UCR4_DREN_MASK) | in UART_DisableInterrupts()
571 (((mask >> 30) << UART_UCR4_IDDMAEN_SHIFT) & UART_UCR4_IDDMAEN_MASK)); in UART_DisableInterrupts()