Home
last modified time | relevance | path

Searched refs:SPI_INTENSET_SSDEN_MASK (Results 1 – 25 of 66) sorted by relevance

123

/hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_minispi/
Dfsl_spi.h208 …kSPI_SlaveSelectDeassertInterruptEnable = SPI_INTENSET_SSDEN_MASK, /*!< Slave select deassert in…
210 … SPI_INTENSET_TXUREN_MASK | SPI_INTENSET_SSAEN_MASK | SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC811/
DLPC811.h3914 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
3920 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC812/
DLPC812.h3918 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
3924 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC810/
DLPC810.h3914 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
3920 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC802/
DLPC802.h3730 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
3736 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC804/
DLPC804.h4401 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
4407 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC824/
DLPC824.h5591 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
5597 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC822/
DLPC822.h5591 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
5597 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC834/
DLPC834.h5435 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
5441 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC832/
DLPC832.h5435 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
5441 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC844/
DLPC844.h6091 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
6097 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC845/
DLPC845.h6615 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
6621 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h8043 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
8049 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h8041 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
8047 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC51U68/
DLPC51U68.h7153 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
7159 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm0plus.h7454 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
7460 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
DLPC54114_cm4.h7465 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
7471 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h7466 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
7472 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h11562 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
11568 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h11580 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
11586 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h10788 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
10794 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h10918 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
10924 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h15066 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
15072 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h14168 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
14174 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/
DLPC54616.h15141 #define SPI_INTENSET_SSDEN_MASK (0x20U) macro
15147 … (((uint32_t)(((uint32_t)(x)) << SPI_INTENSET_SSDEN_SHIFT)) & SPI_INTENSET_SSDEN_MASK)

123