Home
last modified time | relevance | path

Searched refs:SPI_CFG_MASTER_MASK (Results 1 – 25 of 67) sorted by relevance

123

/hal_nxp-latest/mcux/mcux-sdk/drivers/flexcomm/spi/
Dfsl_spi.c205 …tmpConfig &= ~(SPI_CFG_MASTER_MASK | SPI_CFG_LSBF_MASK | SPI_CFG_CPHA_MASK | SPI_CFG_CPOL_MASK | S… in SPI_MasterInit()
317 tmpConfig &= ~(SPI_CFG_MASTER_MASK | SPI_CFG_LSBF_MASK | SPI_CFG_CPHA_MASK | SPI_CFG_CPOL_MASK | in SPI_SlaveInit()
489 if ((base->CFG & SPI_CFG_MASTER_MASK) != 0U) in SPI_MasterTransferCreateHandle()
/hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_minispi/
Dfsl_spi.h462 return (bool)(((base->CFG) & SPI_CFG_MASTER_MASK) >> SPI_CFG_MASTER_SHIFT); in SPI_IsMaster()
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC811/
DLPC811.h3718 #define SPI_CFG_MASTER_MASK (0x4U) macro
3724 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC812/
DLPC812.h3722 #define SPI_CFG_MASTER_MASK (0x4U) macro
3728 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC810/
DLPC810.h3718 #define SPI_CFG_MASTER_MASK (0x4U) macro
3724 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC802/
DLPC802.h3527 #define SPI_CFG_MASTER_MASK (0x4U) macro
3533 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC804/
DLPC804.h4198 #define SPI_CFG_MASTER_MASK (0x4U) macro
4204 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC824/
DLPC824.h5374 #define SPI_CFG_MASTER_MASK (0x4U) macro
5380 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC822/
DLPC822.h5374 #define SPI_CFG_MASTER_MASK (0x4U) macro
5380 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC834/
DLPC834.h5218 #define SPI_CFG_MASTER_MASK (0x4U) macro
5224 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC832/
DLPC832.h5218 #define SPI_CFG_MASTER_MASK (0x4U) macro
5224 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC844/
DLPC844.h5874 #define SPI_CFG_MASTER_MASK (0x4U) macro
5880 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC845/
DLPC845.h6398 #define SPI_CFG_MASTER_MASK (0x4U) macro
6404 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC865/
DLPC865.h7800 #define SPI_CFG_MASTER_MASK (0x4U) macro
7806 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC864/
DLPC864.h7798 #define SPI_CFG_MASTER_MASK (0x4U) macro
7804 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC51U68/
DLPC51U68.h6998 #define SPI_CFG_MASTER_MASK (0x4U) macro
7004 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54114/
DLPC54114_cm0plus.h7299 #define SPI_CFG_MASTER_MASK (0x4U) macro
7305 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
DLPC54114_cm4.h7310 #define SPI_CFG_MASTER_MASK (0x4U) macro
7316 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/
DLPC54113.h7311 #define SPI_CFG_MASTER_MASK (0x4U) macro
7317 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/
DLPC54607.h11388 #define SPI_CFG_MASTER_MASK (0x4U) macro
11394 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S005/
DLPC54S005.h11406 #define SPI_CFG_MASTER_MASK (0x4U) macro
11412 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54005/
DLPC54005.h10614 #define SPI_CFG_MASTER_MASK (0x4U) macro
10620 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54605/
DLPC54605.h10744 #define SPI_CFG_MASTER_MASK (0x4U) macro
10750 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/
DLPC54606.h14892 #define SPI_CFG_MASTER_MASK (0x4U) macro
14898 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/
DLPC54016.h13995 #define SPI_CFG_MASTER_MASK (0x4U) macro
14001 … (((uint32_t)(((uint32_t)(x)) << SPI_CFG_MASTER_SHIFT)) & SPI_CFG_MASTER_MASK)

123