| /hal_nxp-latest/s32/mcux/devices/S32Z270/ |
| D | S32Z270_glue_mcux.h | 55 #define SPI0_BASE IP_MSC_0_DSPI_BASE macro 57 #define SPI0 ((SPI_Type *)SPI0_BASE) 59 #define SPI_BASE_ADDRS { SPI0_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/boards/frdmk22f/ |
| D | board.h | 158 #define BOARD_SDSPI_SPI_BASE SPI0_BASE /*!< SPI base address for SDSPI */
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC811/ |
| D | LPC811.h | 4145 #define SPI0_BASE (0x40058000u) macro 4147 #define SPI0 ((SPI_Type *)SPI0_BASE) 4149 #define SPI_BASE_ADDRS { SPI0_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC041/ |
| D | MCXC041.h | 6468 #define SPI0_BASE (0x40076000u) macro 6470 #define SPI0 ((SPI_Type *)SPI0_BASE) 6472 #define SPI_BASE_ADDRS { SPI0_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC812/ |
| D | LPC812.h | 4149 #define SPI0_BASE (0x40058000u) macro 4151 #define SPI0 ((SPI_Type *)SPI0_BASE) 4157 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z4/ |
| D | MKE04Z4.h | 5393 #define SPI0_BASE (0x40076000u) macro 5395 #define SPI0 ((SPI_Type *)SPI0_BASE) 5397 #define SPI_BASE_ADDRS { SPI0_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC810/ |
| D | LPC810.h | 4145 #define SPI0_BASE (0x40058000u) macro 4147 #define SPI0 ((SPI_Type *)SPI0_BASE) 4149 #define SPI_BASE_ADDRS { SPI0_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC802/ |
| D | LPC802.h | 4016 #define SPI0_BASE (0x40058000u) macro 4018 #define SPI0 ((SPI_Type *)SPI0_BASE) 4020 #define SPI_BASE_ADDRS { SPI0_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE02Z4/ |
| D | MKE02Z4.h | 5619 #define SPI0_BASE (0x40076000u) macro 5621 #define SPI0 ((SPI_Type *)SPI0_BASE) 5627 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC804/ |
| D | LPC804.h | 4687 #define SPI0_BASE (0x40058000u) macro 4689 #define SPI0 ((SPI_Type *)SPI0_BASE) 4691 #define SPI_BASE_ADDRS { SPI0_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE04Z1284/ |
| D | MKE04Z1284.h | 6134 #define SPI0_BASE (0x40076000u) macro 6136 #define SPI0 ((SPI_Type *)SPI0_BASE) 6142 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC824/ |
| D | LPC824.h | 5905 #define SPI0_BASE (0x40058000u) macro 5907 #define SPI0 ((SPI_Type *)SPI0_BASE) 5913 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC822/ |
| D | LPC822.h | 5905 #define SPI0_BASE (0x40058000u) macro 5907 #define SPI0 ((SPI_Type *)SPI0_BASE) 5913 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE06Z4/ |
| D | MKE06Z4.h | 6922 #define SPI0_BASE (0x40076000u) macro 6924 #define SPI0 ((SPI_Type *)SPI0_BASE) 6930 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC834/ |
| D | LPC834.h | 5749 #define SPI0_BASE (0x40058000u) macro 5751 #define SPI0 ((SPI_Type *)SPI0_BASE) 5757 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC832/ |
| D | LPC832.h | 5749 #define SPI0_BASE (0x40058000u) macro 5751 #define SPI0 ((SPI_Type *)SPI0_BASE) 5757 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/ |
| D | MKL17Z644.h | 7955 #define SPI0_BASE (0x40076000u) macro 7957 #define SPI0 ((SPI_Type *)SPI0_BASE) 7963 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/ |
| D | MCXC141.h | 8952 #define SPI0_BASE (0x40076000u) macro 8954 #define SPI0 ((SPI_Type *)SPI0_BASE) 8960 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/ |
| D | MCXC142.h | 8950 #define SPI0_BASE (0x40076000u) macro 8952 #define SPI0 ((SPI_Type *)SPI0_BASE) 8958 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/ |
| D | MKL25Z4.h | 4141 #define SPI0_BASE (0x40076000u) macro 4143 #define SPI0 ((SPI_Type *)SPI0_BASE) 4149 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC844/ |
| D | LPC844.h | 6393 #define SPI0_BASE (0x40058000u) macro 6395 #define SPI0 ((SPI_Type *)SPI0_BASE) 6401 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC845/ |
| D | LPC845.h | 6917 #define SPI0_BASE (0x40058000u) macro 6919 #define SPI0 ((SPI_Type *)SPI0_BASE) 6925 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC242/ |
| D | MCXC242.h | 8960 #define SPI0_BASE (0x40076000u) macro 8962 #define SPI0 ((SPI_Type *)SPI0_BASE) 8968 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKL27Z644/ |
| D | MKL27Z644.h | 7971 #define SPI0_BASE (0x40076000u) macro 7973 #define SPI0 ((SPI_Type *)SPI0_BASE) 7979 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/ |
| D | MCXC144.h | 9602 #define SPI0_BASE (0x40076000u) macro 9604 #define SPI0 ((SPI_Type *)SPI0_BASE) 9610 #define SPI_BASE_ADDRS { SPI0_BASE, SPI1_BASE }
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