1 /* 2 * Copyright (c) 2015, Freescale Semiconductor, Inc. 3 * Copyright 2016-2018 NXP 4 * All rights reserved. 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 9 #ifndef _BOARD_H_ 10 #define _BOARD_H_ 11 12 #include "clock_config.h" 13 #include "fsl_gpio.h" 14 15 /******************************************************************************* 16 * Definitions 17 ******************************************************************************/ 18 /*! @brief The board name */ 19 #define BOARD_NAME "FRDM-K22F" 20 21 /*! @brief The UART to use for debug messages. */ 22 #define BOARD_USE_UART 23 #define BOARD_DEBUG_UART_TYPE kSerialPort_Uart 24 #define BOARD_DEBUG_UART_BASEADDR (uint32_t) UART1 25 #define BOARD_DEBUG_UART_INSTANCE 1U 26 #define BOARD_DEBUG_UART_CLKSRC SYS_CLK 27 #define BOARD_DEBUG_UART_CLK_FREQ CLOCK_GetCoreSysClkFreq() 28 #define BOARD_UART_IRQ UART1_RX_TX_IRQn 29 #define BOARD_UART_IRQ_HANDLER UART1_RX_TX_IRQHandler 30 31 #ifndef BOARD_DEBUG_UART_BAUDRATE 32 #define BOARD_DEBUG_UART_BAUDRATE 115200 33 #endif /* BOARD_DEBUG_UART_BAUDRATE */ 34 35 /*! @brief The bubble level demo information */ 36 #define BOARD_FXOS8700_ADDR 0x1C 37 #define BOARD_ACCEL_ADDR BOARD_FXOS8700_ADDR 38 #define BOARD_ACCEL_BAUDRATE 100 39 #define BOARD_ACCEL_I2C_BASEADDR I2C0 40 #define BOARD_ACCEL_I2C_CLOCK_FREQ CLOCK_GetFreq(I2C0_CLK_SRC) 41 42 /*! @brief The i2c instance used for i2c connection by default */ 43 #define BOARD_I2C_BASEADDR I2C0 44 45 /*! @brief The CMP instance/channel used for board. */ 46 #define BOARD_CMP_BASEADDR CMP0 47 #define BOARD_CMP_CHANNEL 0U 48 49 /*! @brief The rtc instance used for board. */ 50 #define BOARD_RTC_FUNC_BASEADDR RTC 51 52 /*! @brief Define the port interrupt number for the board switches */ 53 #ifndef BOARD_SW3_GPIO 54 #define BOARD_SW3_GPIO GPIOB 55 #endif 56 #ifndef BOARD_SW3_PORT 57 #define BOARD_SW3_PORT PORTB 58 #endif 59 #ifndef BOARD_SW3_GPIO_PIN 60 #define BOARD_SW3_GPIO_PIN 17 61 #endif 62 #define BOARD_SW3_IRQ PORTB_IRQn 63 #define BOARD_SW3_IRQ_HANDLER PORTB_IRQHandler 64 #define BOARD_SW3_NAME "SW3" 65 66 #ifndef BOARD_SW2_GPIO 67 #define BOARD_SW2_GPIO GPIOC 68 #endif 69 #ifndef BOARD_SW2_PORT 70 #define BOARD_SW2_PORT PORTC 71 #endif 72 #ifndef BOARD_SW2_GPIO_PIN 73 #define BOARD_SW2_GPIO_PIN 1 74 #endif 75 #define BOARD_SW2_IRQ PORTC_IRQn 76 #define BOARD_SW2_IRQ_HANDLER PORTC_IRQHandler 77 #define BOARD_SW2_NAME "SW2" 78 79 #define LLWU_SW_GPIO BOARD_SW2_GPIO 80 #define LLWU_SW_PORT BOARD_SW2_PORT 81 #define LLWU_SW_GPIO_PIN BOARD_SW2_GPIO_PIN 82 #define LLWU_SW_IRQ BOARD_SW2_IRQ 83 #define LLWU_SW_IRQ_HANDLER BOARD_SW2_IRQ_HANDLER 84 #define LLWU_SW_NAME BOARD_SW2_NAME 85 86 /* Board led color mapping */ 87 #define LOGIC_LED_ON 0U 88 #define LOGIC_LED_OFF 1U 89 #ifndef BOARD_LED_RED_GPIO 90 #define BOARD_LED_RED_GPIO GPIOA 91 #endif 92 #define BOARD_LED_RED_GPIO_PORT PORTA 93 #ifndef BOARD_LED_RED_GPIO_PIN 94 #define BOARD_LED_RED_GPIO_PIN 1U 95 #endif 96 #ifndef BOARD_LED_GREEN_GPIO 97 #define BOARD_LED_GREEN_GPIO GPIOA 98 #endif 99 #define BOARD_LED_GREEN_GPIO_PORT PORTA 100 #ifndef BOARD_LED_GREEN_GPIO_PIN 101 #define BOARD_LED_GREEN_GPIO_PIN 2U 102 #endif 103 #ifndef BOARD_LED_BLUE_GPIO 104 #define BOARD_LED_BLUE_GPIO GPIOD 105 #endif 106 #define BOARD_LED_BLUE_GPIO_PORT PORTD 107 #ifndef BOARD_LED_BLUE_GPIO_PIN 108 #define BOARD_LED_BLUE_GPIO_PIN 5U 109 #endif 110 111 #define BOARD_ARDUINO_INT_IRQ (PORTB_IRQn) 112 #define BOARD_ARDUINO_I2C_IRQ (I2C0_IRQn) 113 #define BOARD_ARDUINO_I2C_INDEX (0) 114 115 #define LED_RED_INIT(output) \ 116 GPIO_PinWrite(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PIN, output); \ 117 BOARD_LED_RED_GPIO->PDDR |= (1U << BOARD_LED_RED_GPIO_PIN) /*!< Enable target LED_RED */ 118 #define LED_RED_ON() GPIO_PortClear(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn on target LED_RED */ 119 #define LED_RED_OFF() GPIO_PortSet(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn off target LED_RED */ 120 #define LED_RED_TOGGLE() \ 121 GPIO_PortToggle(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN) /*!< Toggle on target LED_RED */ 122 123 #define LED_GREEN_INIT(output) \ 124 GPIO_PinWrite(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PIN, output); \ 125 BOARD_LED_GREEN_GPIO->PDDR |= (1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Enable target LED_GREEN */ 126 #define LED_GREEN_ON() \ 127 GPIO_PortClear(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED_GREEN */ 128 #define LED_GREEN_OFF() \ 129 GPIO_PortSet(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED_GREEN */ 130 #define LED_GREEN_TOGGLE() \ 131 GPIO_PortToggle(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED_GREEN */ 132 133 #define LED_BLUE_INIT(output) \ 134 GPIO_PinWrite(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PIN, output); \ 135 BOARD_LED_BLUE_GPIO->PDDR |= (1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Enable target LED_BLUE */ 136 #define LED_BLUE_ON() \ 137 GPIO_PortClear(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED_BLUE \ 138 */ 139 #define LED_BLUE_OFF() \ 140 GPIO_PortSet(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED_BLUE \ 141 */ 142 #define LED_BLUE_TOGGLE() \ 143 GPIO_PortToggle(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED_BLUE */ 144 145 /* ERPC DSPI configuration */ 146 #define ERPC_BOARD_SPI_SLAVE_READY_USE_GPIO (1) 147 #define ERPC_BOARD_DSPI_BASEADDR SPI0 148 #define ERPC_BOARD_DSPI_BAUDRATE 500000U 149 #define ERPC_BOARD_DSPI_CLKSRC DSPI0_CLK_SRC 150 #define ERPC_BOARD_DSPI_CLK_FREQ CLOCK_GetFreq(DSPI0_CLK_SRC) 151 #define ERPC_BOARD_DSPI_INT_GPIO GPIOB 152 #define ERPC_BOARD_DSPI_INT_PORT PORTB 153 #define ERPC_BOARD_DSPI_INT_PIN 2U 154 #define ERPC_BOARD_DSPI_INT_PIN_IRQ PORTB_IRQn 155 #define ERPC_BOARD_DSPI_INT_PIN_IRQ_HANDLER PORTB_IRQHandler 156 157 /* @brief The SDSPI disk PHY configuration. */ 158 #define BOARD_SDSPI_SPI_BASE SPI0_BASE /*!< SPI base address for SDSPI */ 159 #define BOARD_SDSPI_CD_GPIO_BASE GPIOB /*!< Port related to card detect pin for SDSPI */ 160 #ifndef BOARD_SDSPI_CD_PIN 161 #define BOARD_SDSPI_CD_PIN 16U /*!< Card detect pin for SDSPI */ 162 #endif 163 #define BOARD_SDSPI_CD_LOGIC_RISING /*!< Logic of card detect pin for SDSPI */ 164 165 /* DAC base address */ 166 #define BOARD_DAC_BASEADDR DAC0 167 168 /* Board accelerometer driver */ 169 #define BOARD_ACCEL_FXOS 170 171 #if defined(__cplusplus) 172 extern "C" { 173 #endif /* __cplusplus */ 174 175 /******************************************************************************* 176 * API 177 ******************************************************************************/ 178 179 void BOARD_InitDebugConsole(void); 180 #if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED 181 void BOARD_I2C_Init(I2C_Type *base, uint32_t clkSrc_Hz); 182 status_t BOARD_I2C_Send(I2C_Type *base, 183 uint8_t deviceAddress, 184 uint32_t subAddress, 185 uint8_t subaddressSize, 186 uint8_t *txBuff, 187 uint8_t txBuffSize); 188 status_t BOARD_I2C_Receive(I2C_Type *base, 189 uint8_t deviceAddress, 190 uint32_t subAddress, 191 uint8_t subaddressSize, 192 uint8_t *rxBuff, 193 uint8_t rxBuffSize); 194 void BOARD_Accel_I2C_Init(void); 195 status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff); 196 status_t BOARD_Accel_I2C_Receive( 197 uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize); 198 #endif /* SDK_I2C_BASED_COMPONENT_USED */ 199 200 #if defined(__cplusplus) 201 } 202 #endif /* __cplusplus */ 203 204 #endif /* _BOARD_H_ */ 205