Home
last modified time | relevance | path

Searched refs:RTC_ISR_IS_32HZ_MASK (Results 1 – 25 of 32) sorted by relevance

12

/hal_nxp-latest/mcux/mcux-sdk/drivers/irtc/
Dfsl_irtc.h110 kIRTC_32hzFlag = RTC_ISR_IS_32HZ_MASK, /*!< 32 Hz interval status flag*/
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h9156 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
9162 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM33ZA5/
DMKM33ZA5.h13861 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
13867 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM34ZA5/
DMKM34ZA5.h13857 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
13863 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM35Z7/
DMKM35Z7.h15325 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
15331 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM34Z7/
DMKM34Z7.h15464 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
15470 …C_ISR_IS_32HZ(x) (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5536/
DLPC5536.h36546 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
36552 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5534/
DLPC5534.h36546 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
36552 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h42683 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
42689 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
DMIMXRT735S_cm33_core1.h42743 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
42749 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
DMIMXRT735S_ezhv.h60956 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
60962 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
DMIMXRT735S_cm33_core0.h60605 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
60611 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S36/
DLPC55S36.h38769 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
38775 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h45966 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
45972 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
DMIMXRT758S_hifi1.h45904 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
45910 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
DMIMXRT758S_cm33_core0.h63830 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
63836 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h49239 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
49245 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h49197 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
49203 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h45904 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
45910 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
DMIMXRT798S_cm33_core1.h45966 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
45972 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
DMIMXRT798S_hifi4.h63745 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
63751 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
DMIMXRT798S_cm33_core0.h63830 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
63836 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h60818 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
60824 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
DMCXN546_cm33_core1.h60818 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
60824 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h60818 #define RTC_ISR_IS_32HZ_MASK (0x800U) macro
60824 … (((uint16_t)(((uint16_t)(x)) << RTC_ISR_IS_32HZ_SHIFT)) & RTC_ISR_IS_32HZ_MASK)

12