1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2019, 2022-2023 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #ifndef FSL_IRTC_H_
9 #define FSL_IRTC_H_
10
11 #include "fsl_common.h"
12
13 /*!
14 * @addtogroup irtc
15 * @{
16 */
17
18 /*******************************************************************************
19 * Definitions
20 ******************************************************************************/
21
22 /*! @name Driver version */
23 /*! @{ */
24 #define FSL_IRTC_DRIVER_VERSION (MAKE_VERSION(2, 3, 1))
25 /*! @} */
26
27 #if !(defined(FSL_FEATURE_RTC_IS_SLAVE) && (FSL_FEATURE_RTC_IS_SLAVE != 0U))
28 #define IRTC_STATUS_W1C_BITS ((uint16_t)(RTC_STATUS_BUS_ERR_MASK) | (uint16_t)(RTC_STATUS_CMP_DONE_MASK))
29 #else
30 #define IRTC_STATUS_W1C_BITS ((uint16_t)(RTC_STATUS_BUS_ERR_MASK))
31 #endif
32
33 #if defined(FSL_FEATURE_RTC_HAS_CLOCK_SELECT) && FSL_FEATURE_RTC_HAS_CLOCK_SELECT
34 /*! @brief IRTC clock select. */
35 typedef enum _irtc_clock_select
36 {
37 kIRTC_Clk16K = 0x0U, /*!< 16.384 kHz clock is selected.*/
38 kIRTC_Clk32K = 0x1U, /*!< 32.768 kHz clock is selected.*/
39 } irtc_clock_select_t;
40 #endif
41
42 #if !defined(FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE) || (!FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE)
43 /*! @brief IRTC filter clock source options. */
44 typedef enum _irtc_filter_clock_source
45 {
46 kIRTC_32K = 0x0U, /*!< Use 32 kHz clock source for the tamper filter.*/
47 kIRTC_512 = 0x1U, /*!< Use 512 Hz clock source for the tamper filter.*/
48 kIRTC_128 = 0x2U, /*!< Use 128 Hz clock source for the tamper filter.*/
49 kIRTC_64 = 0x3U, /*!< Use 64 Hz clock source for the tamper filter.*/
50 kIRTC_16 = 0x4U, /*!< Use 16 Hz clock source for the tamper filter.*/
51 kIRTC_8 = 0x5U, /*!< Use 8 Hz clock source for the tamper filter.*/
52 kIRTC_4 = 0x6U, /*!< Use 4 Hz clock source for the tamper filter.*/
53 kIRTC_2 = 0x7U /*!< Use 2 Hz clock source for the tamper filter.*/
54 } irtc_filter_clock_source_t;
55
56 /*! @brief IRTC Tamper pins. */
57 typedef enum _irtc_tamper_pins
58 {
59 kIRTC_Tamper_0 = 0U, /*!< External Tamper 0 */
60 kIRTC_Tamper_1, /*!< External Tamper 1 */
61 kIRTC_Tamper_2, /*!< External Tamper 2 */
62 kIRTC_Tamper_3 /*!< Internal tamper, does not have filter configuration */
63 } irtc_tamper_pins_t;
64 #endif
65
66 /*! @brief List of IRTC interrupts */
67 typedef enum _irtc_interrupt_enable
68 {
69 #if !defined(FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE) || (!FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE)
70 kIRTC_TamperInterruptEnable = RTC_IER_TAMPER_IE_MASK, /*!< Tamper Interrupt Enable */
71 #endif
72 kIRTC_AlarmInterruptEnable = RTC_IER_ALM_IE_MASK, /*!< Alarm Interrupt Enable */
73 kIRTC_DayInterruptEnable = RTC_IER_DAY_IE_MASK, /*!< Days Interrupt Enable */
74 kIRTC_HourInterruptEnable = RTC_IER_HOUR_IE_MASK, /*!< Hours Interrupt Enable */
75 kIRTC_MinInterruptEnable = RTC_IER_MIN_IE_MASK, /*!< Minutes Interrupt Enable */
76 kIRTC_1hzInterruptEnable = RTC_IER_IE_1HZ_MASK, /*!< 1 Hz interval Interrupt Enable */
77 kIRTC_2hzInterruptEnable = RTC_IER_IE_2HZ_MASK, /*!< 2 Hz interval Interrupt Enable */
78 kIRTC_4hzInterruptEnable = RTC_IER_IE_4HZ_MASK, /*!< 4 Hz interval Interrupt Enable */
79 kIRTC_8hzInterruptEnable = RTC_IER_IE_8HZ_MASK, /*!< 8 Hz interval Interrupt Enable */
80 kIRTC_16hzInterruptEnable = RTC_IER_IE_16HZ_MASK, /*!< 16 Hz interval Interrupt Enable */
81 kIRTC_32hzInterruptEnable = RTC_IER_IE_32HZ_MASK, /*!< 32 Hz interval Interrupt Enable */
82 kIRTC_64hzInterruptEnable = RTC_IER_IE_64HZ_MASK, /*!< 64 Hz interval Interrupt Enable */
83 kIRTC_128hzInterruptEnable = RTC_IER_IE_128HZ_MASK, /*!< 128 Hz interval Interrupt Enable */
84 kIRTC_256hzInterruptEnable = RTC_IER_IE_256HZ_MASK, /*!< 256 Hz interval Interrupt Enable */
85 kIRTC_512hzInterruptEnable = RTC_IER_IE_512HZ_MASK, /*!< 512 Hz interval Interrupt Enable */
86 #if defined(FSL_FEATURE_RTC_HAS_SUBSYSTEM) && FSL_FEATURE_RTC_HAS_SUBSYSTEM
87 kIRTC_WakeTimerInterruptEnable = (RTC_WAKE_TIMER_CTRL_INTR_EN_MASK << 16U), /*!< Wake timer Interrupt Enable */
88 #endif
89 #if defined(FSL_FEATURE_RTC_HAS_TAMPER_QUEUE) && FSL_FEATURE_RTC_HAS_TAMPER_QUEUE
90 kIRTC_TamperQueueFullInterruptEnable =
91 (RTC_TAMPER_QSCR_Q_FULL_INT_EN_MASK << 24U), /*!< Tamper queue full Interrupt Enable */
92 #endif
93 } irtc_interrupt_enable_t;
94
95 /*! @brief List of IRTC flags */
96 typedef enum _irtc_status_flags
97 {
98 #if !defined(FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE) || (!FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE)
99 kIRTC_TamperFlag = RTC_ISR_TAMPER_IS_MASK, /*!< Tamper Status flag*/
100 #endif
101 kIRTC_AlarmFlag = RTC_ISR_ALM_IS_MASK, /*!< Alarm Status flag */
102 kIRTC_DayFlag = RTC_ISR_DAY_IS_MASK, /*!< Days Status flag */
103 kIRTC_HourFlag = RTC_ISR_HOUR_IS_MASK, /*!< Hour Status flag */
104 kIRTC_MinFlag = RTC_ISR_MIN_IS_MASK, /*!< Minutes Status flag */
105 kIRTC_1hzFlag = RTC_ISR_IS_1HZ_MASK, /*!< 1 Hz interval status flag */
106 kIRTC_2hzFlag = RTC_ISR_IS_2HZ_MASK, /*!< 2 Hz interval status flag*/
107 kIRTC_4hzFlag = RTC_ISR_IS_4HZ_MASK, /*!< 4 Hz interval status flag*/
108 kIRTC_8hzFlag = RTC_ISR_IS_8HZ_MASK, /*!< 8 Hz interval status flag*/
109 kIRTC_16hzFlag = RTC_ISR_IS_16HZ_MASK, /*!< 16 Hz interval status flag*/
110 kIRTC_32hzFlag = RTC_ISR_IS_32HZ_MASK, /*!< 32 Hz interval status flag*/
111 kIRTC_64hzFlag = RTC_ISR_IS_64HZ_MASK, /*!< 64 Hz interval status flag*/
112 kIRTC_128hzFlag = RTC_ISR_IS_128HZ_MASK, /*!< 128 Hz interval status flag*/
113 kIRTC_256hzFlag = RTC_ISR_IS_256HZ_MASK, /*!< 256 Hz interval status flag*/
114 kIRTC_512hzFlag = RTC_ISR_IS_512HZ_MASK, /*!< 512 Hz interval status flag*/
115 kIRTC_InvalidFlag = (RTC_STATUS_INVAL_BIT_MASK << 16U), /*!< Indicates if time/date counters are invalid */
116 kIRTC_WriteProtFlag = (RTC_STATUS_WRITE_PROT_EN_MASK << 16U), /*!< Write protect enable status flag */
117 #if !defined(FSL_FEATURE_RTC_HAS_NO_CPU_LOW_VOLT_FLAG) || (!FSL_FEATURE_RTC_HAS_NO_CPU_LOW_VOLT_FLAG)
118 kIRTC_CpuLowVoltFlag = (RTC_STATUS_CPU_LOW_VOLT_MASK << 16U), /*!< CPU low voltage warning flag */
119 #endif
120 #if !defined(FSL_FEATURE_RTC_HAS_NO_RST_SRC_FLAG) || (!FSL_FEATURE_RTC_HAS_NO_RST_SRC_FLAG)
121 kIRTC_ResetSrcFlag = (RTC_STATUS_RST_SRC_MASK << 16U), /*!< Reset source flag */
122 #endif
123 #if !(defined(FSL_FEATURE_RTC_IS_SLAVE) && (FSL_FEATURE_RTC_IS_SLAVE != 0U))
124 kIRTC_CmpIntFlag = (RTC_STATUS_CMP_INT_MASK << 16U), /*!< Compensation interval status flag */
125 kIRTC_CmpDoneFlag = (RTC_STATUS_CMP_DONE_MASK << 16U), /*!< Compensation done flag */
126 #endif
127 kIRTC_BusErrFlag = (RTC_STATUS_BUS_ERR_MASK << 16U), /*!< Bus error flag */
128 #if defined(FSL_FEATURE_RTC_HAS_SUBSYSTEM) && FSL_FEATURE_RTC_HAS_SUBSYSTEM
129 kIRTC_WakeTimerFlag = (RTC_WAKE_TIMER_CTRL_WAKE_FLAG_MASK << 28U) /*!< Wake timer status flag */
130 #endif
131 } irtc_status_flags_t;
132
133 /*! @brief IRTC alarm match options */
134 typedef enum _irtc_alarm_match
135 {
136 kRTC_MatchSecMinHr = 0U, /*!< Only match second, minute and hour */
137 kRTC_MatchSecMinHrDay = 1U, /*!< Only match second, minute, hour and day */
138 kRTC_MatchSecMinHrDayMnth = 2U, /*!< Only match second, minute, hour, day and month */
139 kRTC_MatchSecMinHrDayMnthYr = 3U /*!< Only match second, minute, hour, day, month and year */
140 } irtc_alarm_match_t;
141
142 #if !defined(FSL_FEATURE_RTC_HAS_NO_GP_DATA_REG) || (!FSL_FEATURE_RTC_HAS_NO_GP_DATA_REG)
143 /*! @brief List of RTC Oscillator capacitor load settings */
144 typedef enum _irtc_osc_cap_load
145 {
146 kIRTC_Capacitor2p = (1U << 1U), /*!< 2pF capacitor load */
147 kIRTC_Capacitor4p = (1U << 2U), /*!< 4pF capacitor load */
148 kIRTC_Capacitor8p = (1U << 3U), /*!< 8pF capacitor load */
149 kIRTC_Capacitor16p = (1U << 4U) /*!< 16pF capacitor load */
150 } irtc_osc_cap_load_t;
151 #endif
152
153 /*! @brief IRTC clockout select. */
154 typedef enum _irtc_clockout_sel
155 {
156 kIRTC_ClkoutNo = 0U, /*!< No clock out */
157 kIRTC_ClkoutFine1Hz, /*!< clock out fine 1Hz */
158 kIRTC_Clkout32kHz, /*!< clock out 32.768kHz */
159 kIRTC_ClkoutCoarse1Hz /*!< clock out coarse 1Hz */
160 } irtc_clockout_sel_t;
161
162 /*! @brief Structure is used to hold the date and time */
163 typedef struct _irtc_datetime
164 {
165 uint16_t year; /*!< Range from 1984 to 2239.*/
166 uint8_t month; /*!< Range from 1 to 12.*/
167 uint8_t day; /*!< Range from 1 to 31 (depending on month).*/
168 uint8_t weekDay; /*!< Range from 0(Sunday) to 6(Saturday). */
169 uint8_t hour; /*!< Range from 0 to 23.*/
170 uint8_t minute; /*!< Range from 0 to 59.*/
171 uint8_t second; /*!< Range from 0 to 59.*/
172 } irtc_datetime_t;
173
174 /*! @brief Structure is used to hold the daylight saving time */
175 typedef struct _irtc_daylight_time
176 {
177 uint8_t startMonth; /*!< Range from 1 to 12 */
178 uint8_t endMonth; /*!< Range from 1 to 12 */
179 uint8_t startDay; /*!< Range from 1 to 31 (depending on month) */
180 uint8_t endDay; /*!< Range from 1 to 31 (depending on month) */
181 uint8_t startHour; /*!< Range from 0 to 23 */
182 uint8_t endHour; /*!< Range from 0 to 23 */
183 } irtc_daylight_time_t;
184
185 #if !defined(FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE) || (!FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE)
186 /*! @brief Structure is used to define the parameters to configure a RTC tamper event. */
187 typedef struct _irtc_tamper_config
188 {
189 #if FSL_FEATURE_RTC_HAS_TAMPER_DIRECTION
190 bool activePassive; /*!< true: configure tamper as active; false: passive tamper */
191 bool direction; /*!< true: configure tamper direction as output; false: configure as input;
192 this is only used if a tamper pin is defined as active */
193 #endif
194 bool pinPolarity; /*!< true: tamper has active low polarity;
195 false: active high polarity */
196 irtc_filter_clock_source_t filterClk; /*!< Clock source for the tamper filter */
197 uint8_t filterDuration; /*!< Tamper filter duration.*/
198 } irtc_tamper_config_t;
199 #endif
200
201 /*!
202 * @brief RTC config structure
203 *
204 * This structure holds the configuration settings for the RTC peripheral. To initialize this
205 * structure to reasonable defaults, call the IRTC_GetDefaultConfig() function and pass a
206 * pointer to your config structure instance.
207 *
208 * The config struct can be made const so it resides in flash
209 */
210 typedef struct _irtc_config
211 {
212 #if !defined(FSL_FEATURE_RTC_HAS_NO_CTRL2_WAKEUP_MODE) || (!FSL_FEATURE_RTC_HAS_NO_CTRL2_WAKEUP_MODE)
213 bool wakeupSelect; /*!< true: Tamper pin 0 is used to wakeup the chip;
214 false: Tamper pin 0 is used as the tamper pin */
215 #endif
216 #if !defined(FSL_FEATURE_RTC_HAS_NO_TIMER_STB_MASK) || (!FSL_FEATURE_RTC_HAS_NO_TIMER_STB_MASK)
217 bool timerStdMask; /*!< true: Sampling clocks gated in standby mode;
218 false: Sampling clocks not gated */
219 #endif
220 irtc_alarm_match_t alrmMatch; /*!< Pick one option from enumeration :: irtc_alarm_match_t */
221 #if defined(FSL_FEATURE_RTC_HAS_CLOCK_SELECT) && FSL_FEATURE_RTC_HAS_CLOCK_SELECT
222 irtc_clock_select_t clockSelect; /*!< Pick one option from enumeration :: irtc_clock_select_t */
223 #endif
224 #if defined(FSL_FEATURE_RTC_HAS_CLOCK_OUTPUT_DISABLE) && FSL_FEATURE_RTC_HAS_CLOCK_OUTPUT_DISABLE
225 bool disableClockOutput; /*!< true: The selected clock is not output to other peripherals;
226 false: The selected clock is output to other peripherals */
227 #endif
228 } irtc_config_t;
229
230 /*******************************************************************************
231 * API
232 ******************************************************************************/
233
234 #if defined(__cplusplus)
235 extern "C" {
236 #endif
237
238 /*!
239 * @name Initialization and deinitialization
240 * @{
241 */
242
243 /*!
244 * @brief Ungates the IRTC clock and configures the peripheral for basic operation.
245 *
246 * This function initiates a soft-reset of the IRTC module, this has not effect on DST,
247 * calendaring, standby time and tamper detect registers.
248 *
249 * @note This API should be called at the beginning of the application using the IRTC driver.
250 *
251 * @param base IRTC peripheral base address
252 * @param config Pointer to user's IRTC config structure.
253 *
254 * @return kStatus_Success If the driver is initialized successfully.
255 * @return kStatus_Fail if we cannot disable register write protection
256 * @return kStatus_InvalidArgument If the input parameters are wrong.
257 */
258 status_t IRTC_Init(RTC_Type *base, const irtc_config_t *config);
259
260 /*!
261 * @brief Gate the IRTC clock
262 *
263 * @param base IRTC peripheral base address
264 * @return kStatus_Success If the driver is initialized successfully.
265 * @return kStatus_InvalidArgument If the input parameters are wrong.
266 */
267 status_t IRTC_Deinit(RTC_Type *base);
268
269 /*!
270 * @brief Fill in the IRTC config struct with the default settings
271 *
272 * The default values are:
273 * @code
274 * config->wakeupSelect = true;
275 * config->timerStdMask = false;
276 * config->alrmMatch = kRTC_MatchSecMinHr;
277 * @endcode
278 * @param config Pointer to user's IRTC config structure.
279 */
280 void IRTC_GetDefaultConfig(irtc_config_t *config);
281
282 /*! @}*/
283
284 /*!
285 * @name Current Time & Alarm
286 * @{
287 */
288
289 #if !(defined(FSL_FEATURE_RTC_IS_SLAVE) && (FSL_FEATURE_RTC_IS_SLAVE != 0U))
290 /*!
291 * @brief Sets the IRTC date and time according to the given time structure.
292 *
293 * The IRTC counter is started after the time is set.
294 *
295 * @param base IRTC peripheral base address
296 * @param datetime Pointer to structure where the date and time details to set are stored
297 *
298 * @return kStatus_Success: success in setting the time and starting the IRTC
299 * kStatus_InvalidArgument: failure. An error occurs because the datetime format is incorrect.
300 */
301 status_t IRTC_SetDatetime(RTC_Type *base, const irtc_datetime_t *datetime);
302 #endif /* FSL_FEATURE_RTC_IS_SLAVE */
303
304 /*!
305 * @brief Gets the IRTC time and stores it in the given time structure.
306 *
307 * @param base IRTC peripheral base address
308 * @param datetime Pointer to structure where the date and time details are stored.
309 */
310 void IRTC_GetDatetime(RTC_Type *base, irtc_datetime_t *datetime);
311
312 /*!
313 * @brief Sets the IRTC alarm time
314 *
315 * @param base RTC peripheral base address
316 * @param alarmTime Pointer to structure where the alarm time is stored.
317 *
318 * @note weekDay field of alarmTime is not used during alarm match and should be set to 0
319 *
320 * @return kStatus_Success: success in setting the alarm
321 * kStatus_InvalidArgument: error in setting the alarm. Error occurs because the alarm
322 * datetime format is incorrect.
323 */
324 status_t IRTC_SetAlarm(RTC_Type *base, const irtc_datetime_t *alarmTime);
325
326 /*!
327 * @brief Returns the IRTC alarm time.
328 *
329 * @param base RTC peripheral base address
330 * @param datetime Pointer to structure where the alarm date and time details are stored.
331 */
332 void IRTC_GetAlarm(RTC_Type *base, irtc_datetime_t *datetime);
333 /*! @}*/
334
335 /*!
336 * @name Interrupt Interface
337 * @{
338 */
339
340 /*!
341 * @brief Enables the selected IRTC interrupts.
342 *
343 * @param base IRTC peripheral base address
344 * @param mask The interrupts to enable. This is a logical OR of members of the
345 * enumeration ::irtc_interrupt_enable_t
346 */
IRTC_EnableInterrupts(RTC_Type * base,uint32_t mask)347 static inline void IRTC_EnableInterrupts(RTC_Type *base, uint32_t mask)
348 {
349 base->IER |= (uint16_t)mask;
350 #if defined(FSL_FEATURE_RTC_HAS_SUBSYSTEM) && FSL_FEATURE_RTC_HAS_SUBSYSTEM
351 if (0U != (mask & (uint32_t)kIRTC_WakeTimerInterruptEnable))
352 {
353 base->WAKE_TIMER_CTRL |= RTC_WAKE_TIMER_CTRL_INTR_EN_MASK;
354 }
355 #endif
356 #if !defined(FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE) || (!FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE)
357 #if defined(FSL_FEATURE_RTC_HAS_TAMPER_QUEUE) && (FSL_FEATURE_RTC_HAS_TAMPER_QUEUE)
358 if (0U != (mask & (uint32_t)kIRTC_TamperQueueFullInterruptEnable))
359 {
360 base->TAMPER_QSCR |= RTC_TAMPER_QSCR_Q_FULL_INT_EN_MASK;
361 }
362 #endif
363 #endif
364 }
365
366 /*!
367 * @brief Disables the selected IRTC interrupts.
368 *
369 * @param base IRTC peripheral base address
370 * @param mask The interrupts to enable. This is a logical OR of members of the
371 * enumeration ::irtc_interrupt_enable_t
372 */
IRTC_DisableInterrupts(RTC_Type * base,uint32_t mask)373 static inline void IRTC_DisableInterrupts(RTC_Type *base, uint32_t mask)
374 {
375 base->IER &= ~(uint16_t)mask;
376 #if defined(FSL_FEATURE_RTC_HAS_SUBSYSTEM) && FSL_FEATURE_RTC_HAS_SUBSYSTEM
377 if (0U != (mask & (uint32_t)kIRTC_WakeTimerInterruptEnable))
378 {
379 base->WAKE_TIMER_CTRL &= ~(uint16_t)RTC_WAKE_TIMER_CTRL_INTR_EN_MASK;
380 }
381 #endif
382 #if !defined(FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE) || (!FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE)
383 #if defined(FSL_FEATURE_RTC_HAS_TAMPER_QUEUE) && (FSL_FEATURE_RTC_HAS_TAMPER_QUEUE)
384 if (0U != (mask & (uint32_t)kIRTC_TamperQueueFullInterruptEnable))
385 {
386 base->TAMPER_QSCR &= ~(uint16_t)RTC_TAMPER_QSCR_Q_FULL_INT_EN_MASK;
387 }
388 #endif
389 #endif
390 }
391
392 /*!
393 * @brief Gets the enabled IRTC interrupts.
394 *
395 * @param base IRTC peripheral base address
396 *
397 * @return The enabled interrupts. This is the logical OR of members of the
398 * enumeration ::irtc_interrupt_enable_t
399 */
IRTC_GetEnabledInterrupts(RTC_Type * base)400 static inline uint32_t IRTC_GetEnabledInterrupts(RTC_Type *base)
401 {
402 uint32_t intsEnabled = base->IER;
403 #if defined(FSL_FEATURE_RTC_HAS_SUBSYSTEM) && FSL_FEATURE_RTC_HAS_SUBSYSTEM
404 intsEnabled |= (base->WAKE_TIMER_CTRL & (uint32_t)RTC_WAKE_TIMER_CTRL_INTR_EN_MASK) << 16U;
405 #endif
406 #if !defined(FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE) || (!FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE)
407 #if defined(FSL_FEATURE_RTC_HAS_TAMPER_QUEUE) && (FSL_FEATURE_RTC_HAS_TAMPER_QUEUE)
408 intsEnabled |= (base->TAMPER_QSCR & (uint32_t)RTC_TAMPER_QSCR_Q_FULL_INT_EN_MASK) << 24U;
409 #endif
410 #endif
411
412 return intsEnabled;
413 }
414
415 /*! @}*/
416
417 /*!
418 * @name Status Interface
419 * @{
420 */
421
422 /*!
423 * @brief Gets the IRTC status flags
424 *
425 * @param base IRTC peripheral base address
426 *
427 * @return The status flags. This is the logical OR of members of the
428 * enumeration ::irtc_status_flags_t
429 */
IRTC_GetStatusFlags(RTC_Type * base)430 static inline uint32_t IRTC_GetStatusFlags(RTC_Type *base)
431 {
432 #if defined(FSL_FEATURE_RTC_HAS_SUBSYSTEM) && FSL_FEATURE_RTC_HAS_SUBSYSTEM
433 return (base->ISR | ((uint32_t)base->STATUS << 16U) | ((uint32_t)base->WAKE_TIMER_CTRL << 28U));
434 #else
435 return (base->ISR | ((uint32_t)base->STATUS << 16U));
436 #endif
437 }
438
439 /*!
440 * @brief Clears the IRTC status flags.
441 *
442 * @param base IRTC peripheral base address
443 * @param mask The status flags to clear. This is a logical OR of members of the
444 * enumeration ::irtc_status_flags_t
445 */
IRTC_ClearStatusFlags(RTC_Type * base,uint32_t mask)446 static inline void IRTC_ClearStatusFlags(RTC_Type *base, uint32_t mask)
447 {
448 base->ISR = (uint16_t)mask;
449 base->STATUS = (base->STATUS & ~IRTC_STATUS_W1C_BITS) |
450 ((uint16_t)(mask >> 16U));
451 #if !defined(FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE) || (!FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE)
452 /* TAMPER flag need clear TAMPER_SCR[TMPR_STS] filed */
453 if (0U != (mask & (uint32_t)kIRTC_TamperFlag))
454 {
455 base->TAMPER_SCR |= RTC_TAMPER_SCR_TMPR_STS_MASK;
456 }
457 #endif
458 #if defined(FSL_FEATURE_RTC_HAS_SUBSYSTEM) && FSL_FEATURE_RTC_HAS_SUBSYSTEM
459 if (0U != (mask & (uint32_t)kIRTC_WakeTimerFlag))
460 {
461 base->WAKE_TIMER_CTRL |= RTC_WAKE_TIMER_CTRL_WAKE_FLAG_MASK;
462 }
463 #endif
464 }
465
466 /*! @}*/
467
468 #if !defined(FSL_FEATURE_RTC_HAS_NO_GP_DATA_REG) || (!FSL_FEATURE_RTC_HAS_NO_GP_DATA_REG)
469
470 /*!
471 * @brief This function sets the specified capacitor configuration for the RTC oscillator.
472 *
473 * @param base IRTC peripheral base address
474 * @param capLoad Oscillator loads to enable. This is a logical OR of members of the
475 * enumeration ::irtc_osc_cap_load_t
476 */
IRTC_SetOscCapLoad(RTC_Type * base,uint16_t capLoad)477 static inline void IRTC_SetOscCapLoad(RTC_Type *base, uint16_t capLoad)
478 {
479 uint16_t reg = base->GP_DATA_REG;
480
481 reg &= ~((uint16_t)kIRTC_Capacitor2p | (uint16_t)kIRTC_Capacitor4p | (uint16_t)kIRTC_Capacitor8p |
482 (uint16_t)kIRTC_Capacitor16p);
483 reg |= capLoad;
484
485 base->GP_DATA_REG = reg;
486 }
487
488 #endif
489
490 /*!
491 * @brief Locks or unlocks IRTC registers for write access.
492 *
493 * @note When the registers are unlocked, they remain in unlocked state for
494 * 2 seconds, after which they are locked automatically. After
495 * power-on-reset, the registers come out unlocked and they are locked
496 * automatically 15 seconds after power on.
497 *
498 * @param base IRTC peripheral base address
499 * @param lock true: Lock IRTC registers; false: Unlock IRTC registers.
500 *
501 * @return kStatus_Success: if lock or unlock operation is successful
502 * kStatus_Fail: if lock or unlock operation fails even after multiple retry attempts
503 */
504 status_t IRTC_SetWriteProtection(RTC_Type *base, bool lock);
505
506 /*!
507 * @brief Performs a software reset on the IRTC module.
508 *
509 * Clears contents of alarm, interrupt (status and enable except tamper interrupt enable bit)
510 * registers, STATUS[CMP_DONE] and STATUS[BUS_ERR]. This has no effect on DST, calendaring, standby time
511 * and tamper detect registers.
512 *
513 * @param base IRTC peripheral base address
514 */
IRTC_Reset(RTC_Type * base)515 static inline void IRTC_Reset(RTC_Type *base)
516 {
517 base->CTRL |= RTC_CTRL_SWR_MASK;
518 }
519
520 #if !defined(FSL_FEATURE_RTC_HAS_NO_GP_DATA_REG) || (!FSL_FEATURE_RTC_HAS_NO_GP_DATA_REG)
521
522 /*!
523 * @brief Enable/disable 32 kHz RTC OSC clock during RTC register write
524 *
525 * @param base IRTC peripheral base address
526 * @param enable Enable/disable 32 kHz RTC OSC clock.
527 * - true: Enables the oscillator.
528 * - false: Disables the oscillator.
529 *
530 */
IRTC_Enable32kClkDuringRegisterWrite(RTC_Type * base,bool enable)531 static inline void IRTC_Enable32kClkDuringRegisterWrite(RTC_Type *base, bool enable)
532 {
533 uint16_t mask = RTC_GP_DATA_REG_CFG0_MASK;
534 if (enable)
535 {
536 base->GP_DATA_REG &= ~mask;
537 }
538 else
539 {
540 base->GP_DATA_REG |= mask;
541 }
542 }
543
544 #endif
545
546 /*!
547 * @brief Select which clock to output from RTC.
548 *
549 * Select which clock to output from RTC for other modules to use inside SoC, for example,
550 * RTC subsystem needs RTC to output 1HZ clock for sub-second counter.
551 *
552 * @param base IRTC peripheral base address
553 * @param clkOut select clock to use for output,
554 */
555 void IRTC_ConfigClockOut(RTC_Type *base, irtc_clockout_sel_t clkOut);
556
557 #if defined(FSL_FEATURE_RTC_HAS_CLOCK_SELECT) && FSL_FEATURE_RTC_HAS_CLOCK_SELECT
558
559 /*!
560 * @brief Select which clock is used by RTC.
561 *
562 * Select which clock is used by RTC to output to the peripheral
563 * and divided to generate a 512 Hz clock and a 1 Hz clock.
564 *
565 * @param base IRTC peripheral base address
566 * @param clkSelect select clock used by RTC
567 */
568 void IRTC_ConfigClockSelect(RTC_Type *base, irtc_clock_select_t clkSelect);
569
570 #endif /* FSL_FEATURE_RTC_HAS_CLOCK_SELECT */
571
572 #if defined(FSL_FEATURE_RTC_HAS_CLOCK_OUTPUT_DISABLE) && FSL_FEATURE_RTC_HAS_CLOCK_OUTPUT_DISABLE
573
574 /*!
575 * @brief Determines whether the selected clock is output to other peripherals.
576 *
577 * Determines whether the selected clock is output to other peripherals.
578 *
579 * @param base IRTC peripheral base address
580 * @param enable determine whether the selected clock is output to other peripherals
581 */
IRTC_EnableClockOutputToPeripheral(RTC_Type * base,bool enable)582 static inline void IRTC_EnableClockOutputToPeripheral(RTC_Type *base, bool enable)
583 {
584 if (enable)
585 {
586 base->CTRL &= ~(uint16_t)RTC_CTRL_CLKO_DIS_MASK;
587 }
588 else
589 {
590 base->CTRL |= RTC_CTRL_CLKO_DIS_MASK;
591 }
592 }
593
594 #endif /* FSL_FEATURE_RTC_HAS_CLOCK_OUTPUT_DISABLE */
595
596 #if !defined(FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE) || (!FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE)
597
598 /*!
599 * @brief Gets the IRTC Tamper status flags
600 *
601 * @param base IRTC peripheral base address
602 *
603 * @return The Tamper status value.
604 */
IRTC_GetTamperStatusFlag(RTC_Type * base)605 static inline uint8_t IRTC_GetTamperStatusFlag(RTC_Type *base)
606 {
607 return (uint8_t)((base->TAMPER_SCR & RTC_TAMPER_SCR_TMPR_STS_MASK) >> RTC_TAMPER_SCR_TMPR_STS_SHIFT);
608 }
609
610 /*!
611 * @brief Gets the IRTC Tamper status flags
612 *
613 * @param base IRTC peripheral base address
614 *
615 */
IRTC_ClearTamperStatusFlag(RTC_Type * base)616 static inline void IRTC_ClearTamperStatusFlag(RTC_Type *base)
617 {
618 /* Writing '1' to this field clears the tamper status.*/
619 base->TAMPER_SCR |= RTC_TAMPER_SCR_TMPR_STS_MASK;
620 }
621
622 /*!
623 * @brief Set tamper configuration over
624 *
625 * Note that this API is neeeded after call IRTC_SetTamperParams to configure tamper events to
626 * notify IRTC module that tamper configuration process is over.
627 *
628 * @param base IRTC peripheral base address
629 *
630 */
IRTC_SetTamperConfigurationOver(RTC_Type * base)631 static inline void IRTC_SetTamperConfigurationOver(RTC_Type *base)
632 {
633 /* Set tamper configuration over.*/
634 base->CTRL2 |= RTC_CTRL2_TAMP_CFG_OVER_MASK;
635 }
636
637 #endif
638
639 /*!
640 * @name Daylight Savings Interface
641 * @{
642 */
643
644 #if !(defined(FSL_FEATURE_RTC_IS_SLAVE) && (FSL_FEATURE_RTC_IS_SLAVE != 0U))
645 /*!
646 * @brief Sets the IRTC daylight savings start and stop date and time.
647 *
648 * It also enables the daylight saving bit in the IRTC control register
649 *
650 * @param base IRTC peripheral base address
651 * @param datetime Pointer to a structure where the date and time details are stored.
652 */
653 void IRTC_SetDaylightTime(RTC_Type *base, const irtc_daylight_time_t *datetime);
654 #endif /* FSL_FEATURE_RTC_IS_SLAVE */
655
656 /*!
657 * @brief Gets the IRTC daylight savings time and stores it in the given time structure.
658 *
659 * @param base IRTC peripheral base address
660 * @param datetime Pointer to a structure where the date and time details are stored.
661 */
662 void IRTC_GetDaylightTime(RTC_Type *base, irtc_daylight_time_t *datetime);
663
664 /*! @}*/
665
666 #if !(defined(FSL_FEATURE_RTC_IS_SLAVE) && (FSL_FEATURE_RTC_IS_SLAVE != 0U))
667 /*!
668 * @name Time Compensation Interface
669 * @{
670 */
671
672 /*!
673 * @brief Enables the coarse compensation and sets the value in the IRTC compensation register.
674 *
675 * @param base IRTC peripheral base address
676 * @param compensationValue Compensation value is a 2's complement value.
677 * @param compensationInterval Compensation interval.
678 */
679 void IRTC_SetCoarseCompensation(RTC_Type *base, uint8_t compensationValue, uint8_t compensationInterval);
680
681 /*!
682 * @brief Enables the fine compensation and sets the value in the IRTC compensation register.
683 *
684 * @param base The IRTC peripheral base address
685 * @param integralValue Compensation integral value; twos complement value of the integer part
686 * @param fractionValue Compensation fraction value expressed as number of clock cycles of a
687 * fixed 4.194304Mhz clock that have to be added.
688 * @param accumulateFractional Flag indicating if we want to add to previous fractional part;
689 * true: Add to previously accumulated fractional part,
690 * false: Start afresh and overwrite current value
691 */
692 void IRTC_SetFineCompensation(RTC_Type *base, uint8_t integralValue, uint8_t fractionValue, bool accumulateFractional);
693
694 /*! @}*/
695 #endif /* FSL_FEATURE_RTC_IS_SLAVE */
696
697 #if !defined(FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE) || (!FSL_FEATURE_RTC_HAS_NO_TAMPER_FEATURE)
698
699 /*!
700 * @name Tamper Interface
701 * @{
702 */
703
704 /*!
705 * @brief This function allows configuring the four tamper inputs.
706 *
707 * The function configures the filter properties for the three external tampers.
708 * It also sets up active/passive and direction of the tamper bits, which are not available
709 * on all platforms.
710 * @note This function programs the tamper filter parameters. The user must gate the 32K clock to
711 * the RTC before calling this function. It is assumed that the time and date are set after this
712 * and the tamper parameters do not require to be changed again later.
713 *
714 * @param base The IRTC peripheral base address
715 * @param tamperNumber The IRTC tamper input to configure
716 * @param tamperConfig The IRTC tamper properties
717 */
718 void IRTC_SetTamperParams(RTC_Type *base, irtc_tamper_pins_t tamperNumber, const irtc_tamper_config_t *tamperConfig);
719
720 #if defined(FSL_FEATURE_RTC_HAS_TAMPER_QUEUE) && (FSL_FEATURE_RTC_HAS_TAMPER_QUEUE)
721
722 /*!
723 * @brief This function reads the tamper timestamp and returns the associated tamper pin.
724 *
725 * The tamper timestamp has month, day, hour, minutes, and seconds. Ignore the year field as this
726 * information is not available in the tamper queue. The user should look at the RTC_YEARMON register
727 * for this because the expectation is that the queue is read at least once a year.
728 * Return the tamper pin number associated with the timestamp.
729 *
730 * @param base The IRTC peripheral base address
731 * @param tamperTimestamp The tamper timestamp
732 *
733 * @return The tamper pin number
734 */
735 uint8_t IRTC_ReadTamperQueue(RTC_Type *base, irtc_datetime_t *tamperTimestamp);
736
737 /*!
738 * @brief Gets the IRTC Tamper queue full status
739 *
740 * @param base IRTC peripheral base address
741 *
742 * @retval true Tamper queue is full.
743 * @retval false Tamper queue is not full.
744 */
IRTC_GetTamperQueueFullStatus(RTC_Type * base)745 static inline bool IRTC_GetTamperQueueFullStatus(RTC_Type *base)
746 {
747 return ((0U != (base->TAMPER_SCR & RTC_TAMPER_QSCR_Q_FULL_MASK)) ? true : false);
748 }
749
750 /*!
751 * @brief Clear the IRTC Tamper queue full status
752 *
753 * @param base IRTC peripheral base address
754 *
755 */
IRTC_ClearTamperQueueFullStatus(RTC_Type * base)756 static inline void IRTC_ClearTamperQueueFullStatus(RTC_Type *base)
757 {
758 base->TAMPER_QSCR |= RTC_TAMPER_QSCR_Q_CLEAR_MASK;
759 }
760 #endif /* FSL_FEATURE_RTC_HAS_TAMPER_QUEUE */
761
762 /*! @}*/
763
764 #endif
765
766 #if defined(FSL_FEATURE_RTC_HAS_SUBSYSTEM) && FSL_FEATURE_RTC_HAS_SUBSYSTEM
767 /*!
768 * @name RTC subsystem Interface
769 * @{
770 */
771
772 #if !(defined(FSL_FEATURE_RTC_HAS_SUBSECOND) && (FSL_FEATURE_RTC_HAS_SUBSECOND == 0))
773 /*!
774 * @brief Enable the RTC wake-up timer.
775 *
776 * 1HZ clock out selected via call to API IRTC_ConfigClockOut in order for the subsecond
777 * counter to synchronize with the RTC_SECONDS counter.
778 *
779 * @param base RTC peripheral base address
780 * @param enable Use/Un-use the sub-second counter.
781 * - true: Use RTC wake-up timer at the same time.
782 * - false: Un-use RTC wake-up timer, RTC only use the normal seconds timer by default.
783 */
IRTC_EnableSubsecondCounter(RTC_Type * base,bool enable)784 static inline void IRTC_EnableSubsecondCounter(RTC_Type *base, bool enable)
785 {
786 if (enable)
787 {
788 base->SUBSECOND_CTRL |= RTC_SUBSECOND_CTRL_SUB_SECOND_CNT_EN_MASK;
789 }
790 else
791 {
792 base->SUBSECOND_CTRL &= ~RTC_SUBSECOND_CTRL_SUB_SECOND_CNT_EN_MASK;
793 }
794 }
795
796 /*!
797 * @brief Read the actual RTC sub-second COUNT value.
798 *
799 * @param base RTC peripheral base address
800 *
801 * @return The actual RTC sub-second COUNT value.
802 */
IRTC_GetSubsecondCount(RTC_Type * base)803 static inline uint32_t IRTC_GetSubsecondCount(RTC_Type *base)
804 {
805 uint32_t a, b;
806
807 /* Follow the RF document to read the RTC default seconds timer (1HZ) counter value. */
808 do
809 {
810 a = base->SUBSECOND_CNT;
811 b = base->SUBSECOND_CNT;
812 } while (a != b);
813
814 return b;
815 }
816 #endif /* FSL_FEATURE_RTC_HAS_SUBSECOND */
817
818 /*!
819 * @brief Set countdown value to the RTC wake timer counter register.
820 *
821 * @param base RTC peripheral base address
822 * @param enable1kHzClk Enable 1kHz clock source for the wake timer, else use the 32kHz clock.
823 * @param wakeupValue The value to be loaded into the WAKE register in wake timer counter.
824 */
IRTC_SetWakeupCount(RTC_Type * base,bool enable1kHzClk,uint32_t wakeupValue)825 static inline void IRTC_SetWakeupCount(RTC_Type *base, bool enable1kHzClk, uint32_t wakeupValue)
826 {
827 /* Config whether enable the wakeup counter */
828 uint32_t writeVal;
829 writeVal = base->WAKE_TIMER_CTRL;
830 base->WAKE_TIMER_CTRL = RTC_WAKE_TIMER_CTRL_CLR_WAKE_TIMER_MASK;
831
832 if (enable1kHzClk)
833 {
834 writeVal |= RTC_WAKE_TIMER_CTRL_OSC_DIV_ENA_MASK;
835 }
836 else
837 {
838 writeVal &= ~RTC_WAKE_TIMER_CTRL_OSC_DIV_ENA_MASK;
839 }
840
841 base->WAKE_TIMER_CTRL = writeVal;
842 /* Set the start countdown value into the RTC WAKE register */
843 base->WAKE_TIMER_CNT = wakeupValue;
844 }
845
846 /*!
847 * @brief Read the actual value from the WAKE register value in RTC wake timer.
848 *
849 * @param base RTC peripheral base address
850 *
851 * @return The actual value of the WAKE register value in wake timer counter.
852 */
IRTC_GetWakeupCount(RTC_Type * base)853 static inline uint32_t IRTC_GetWakeupCount(RTC_Type *base)
854 {
855 /* Read current wake-up countdown value */
856 return base->WAKE_TIMER_CNT;
857 }
858
859 /*! @}*/
860 #endif
861
862 #if defined(__cplusplus)
863 }
864 #endif
865
866 /*! @}*/
867
868 #endif /* FSL_IRTC_H_ */
869
