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Searched refs:MCG_C2_RANGE_MASK (Results 1 – 25 of 102) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MKW41Z4/drivers/
Dfsl_clock.c73 #if (defined(MCG_C2_RANGE_MASK) && !(defined(MCG_C2_RANGE0_MASK)))
74 #define MCG_C2_RANGE0_MASK MCG_C2_RANGE_MASK
101 #define MCG_C2_RANGE_VAL ((MCG->C2 & MCG_C2_RANGE_MASK) >> MCG_C2_RANGE_SHIFT)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/drivers/
Dfsl_clock.c27 #if (defined(MCG_C2_RANGE_MASK) && !(defined(MCG_C2_RANGE0_MASK)))
28 #define MCG_C2_RANGE0_MASK MCG_C2_RANGE_MASK
55 #define MCG_C2_RANGE_VAL ((MCG->C2 & MCG_C2_RANGE_MASK) >> MCG_C2_RANGE_SHIFT)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/drivers/
Dfsl_clock.c27 #if (defined(MCG_C2_RANGE_MASK) && !(defined(MCG_C2_RANGE0_MASK)))
28 #define MCG_C2_RANGE0_MASK MCG_C2_RANGE_MASK
55 #define MCG_C2_RANGE_VAL ((MCG->C2 & MCG_C2_RANGE_MASK) >> MCG_C2_RANGE_SHIFT)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/drivers/
Dfsl_clock.c27 #if (defined(MCG_C2_RANGE_MASK) && !(defined(MCG_C2_RANGE0_MASK)))
28 #define MCG_C2_RANGE0_MASK MCG_C2_RANGE_MASK
55 #define MCG_C2_RANGE_VAL ((MCG->C2 & MCG_C2_RANGE_MASK) >> MCG_C2_RANGE_SHIFT)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/drivers/
Dfsl_clock.c27 #if (defined(MCG_C2_RANGE_MASK) && !(defined(MCG_C2_RANGE0_MASK)))
28 #define MCG_C2_RANGE0_MASK MCG_C2_RANGE_MASK
55 #define MCG_C2_RANGE_VAL ((MCG->C2 & MCG_C2_RANGE_MASK) >> MCG_C2_RANGE_SHIFT)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/drivers/
Dfsl_clock.c27 #if (defined(MCG_C2_RANGE_MASK) && !(defined(MCG_C2_RANGE0_MASK)))
28 #define MCG_C2_RANGE0_MASK MCG_C2_RANGE_MASK
55 #define MCG_C2_RANGE_VAL ((MCG->C2 & MCG_C2_RANGE_MASK) >> MCG_C2_RANGE_SHIFT)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/drivers/
Dfsl_clock.c27 #if (defined(MCG_C2_RANGE_MASK) && !(defined(MCG_C2_RANGE0_MASK)))
28 #define MCG_C2_RANGE0_MASK MCG_C2_RANGE_MASK
55 #define MCG_C2_RANGE_VAL ((MCG->C2 & MCG_C2_RANGE_MASK) >> MCG_C2_RANGE_SHIFT)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/drivers/
Dfsl_clock.c27 #if (defined(MCG_C2_RANGE_MASK) && !(defined(MCG_C2_RANGE0_MASK)))
28 #define MCG_C2_RANGE0_MASK MCG_C2_RANGE_MASK
55 #define MCG_C2_RANGE_VAL ((MCG->C2 & MCG_C2_RANGE_MASK) >> MCG_C2_RANGE_SHIFT)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW41Z4/
Dsystem_MKW41Z4.c111 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((MCG->C7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW21Z4/
Dsystem_MKW21Z4.c110 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((MCG->C7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/
Dsystem_MKV10Z1287.c104 if ((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW31Z4/
Dsystem_MKW31Z4.c111 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((MCG->C7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/
Dsystem_MKV10Z7.c106 if ((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
Dsystem_MKV11Z7.c104 if ((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/
Dsystem_MK02F12810.c123 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((tmpC7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/
Dsystem_MK22F12810.c129 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((tmpC7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/
Dsystem_MKV30F12810.c124 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((tmpC7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/
Dsystem_MKV31F12810.c125 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((tmpC7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/drivers/
Dfsl_clock.c45 #if (defined(MCG_C2_RANGE_MASK) && !(defined(MCG_C2_RANGE0_MASK)))
46 #define MCG_C2_RANGE0_MASK MCG_C2_RANGE_MASK
73 #define MCG_C2_RANGE_VAL ((MCG->C2 & MCG_C2_RANGE_MASK) >> MCG_C2_RANGE_SHIFT)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
Dsystem_MKV58F24.c121 if ((MCG->C2 & MCG_C2_RANGE_MASK) != 0x0U) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/
Dsystem_MKV56F24.c121 if ((MCG->C2 & MCG_C2_RANGE_MASK) != 0x0U) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/
Dsystem_MK22F12.c142 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((tmpC7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/
Dsystem_MKV31F25612.c129 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((tmpC7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F51212/
Dsystem_MKV31F51212.c129 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((tmpC7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()
/hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/
Dsystem_MK27FA15.c119 if (((MCG->C2 & MCG_C2_RANGE_MASK) != 0x00U) && ((tmpC7 & MCG_C7_OSCSEL_MASK) != 0x01U)) { in SystemCoreClockUpdate()

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