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Searched refs:Channel (Results 1 – 25 of 29) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k3/Pwm/src/
DEmios_Pwm_Ip.c236 uint8 Channel, in Emios_Pwm_Ip_ValidateMode() argument
242 …Ret = (((Emios_Pwm_Ip_aChannelModes[Instance][(uint8)Mode] >> Channel) & 0x01UL) == 1UL) ? TRUE : … in Emios_Pwm_Ip_ValidateMode()
248 (void) Channel; in Emios_Pwm_Ip_ValidateMode()
264 uint8 Channel, in Emios_Pwm_Ip_GetCounterBusPeriod() argument
269 DevAssert(EMIOS_PWM_IP_CHANNEL_COUNT > Channel); in Emios_Pwm_Ip_GetCounterBusPeriod()
273 uint8 MasterBusCh = Emios_Pwm_Ip_GetTimebaseChannel(Channel, CounterBus); in Emios_Pwm_Ip_GetCounterBusPeriod()
293 uint8 Channel, in Emios_Pwm_Ip_GetCounterBusMode() argument
305 … = (Emios_Pwm_Ip_MasterBusModeType)Emios_Pwm_Ip_GetChannelPwmMode(Base, (Channel & (uint8)EMIOS_PW… in Emios_Pwm_Ip_GetCounterBusMode()
469 uint8 Channel, in Emios_Pwm_Ip_SetDutyCycleOpwfmb() argument
474 DevAssert(EMIOS_PWM_IP_CHANNEL_COUNT > Channel); in Emios_Pwm_Ip_SetDutyCycleOpwfmb()
[all …]
DEmios_Pwm_Ip_Irq.c207 static void Emios_Pwm_Ip_IrqDaocHandler(uint8 Instance, uint8 Channel) in Emios_Pwm_Ip_IrqDaocHandler() argument
212 …Ip_GetUCRegA(Emios_Pwm_Ip_aBasePtr[Instance], Emios_Pwm_Ip_GetMasterBusChannel(Instance, Channel)); in Emios_Pwm_Ip_IrqDaocHandler()
214 …_Ip_PolarityType Polarity = Emios_Pwm_Ip_GetEdgePolarity(Emios_Pwm_Ip_aBasePtr[Instance], Channel); in Emios_Pwm_Ip_IrqDaocHandler()
215 boolean OutputPin = Emios_Pwm_Ip_GetOutputPinState(Emios_Pwm_Ip_aBasePtr[Instance], Channel); in Emios_Pwm_Ip_IrqDaocHandler()
217 …WM_IP_MODE_DAOC_FLAG == Emios_Pwm_Ip_aCurrentModes[eMios_Pwm_Ip_IndexInChState[Instance][Channel]]) in Emios_Pwm_Ip_IrqDaocHandler()
219 …ios_Pwm_Ip_IndexInChState[Instance][Channel]] - Emios_Pwm_Ip_aDutyCycle[eMios_Pwm_Ip_IndexInChStat… in Emios_Pwm_Ip_IrqDaocHandler()
220 …DaocRegA = ((DaocDuty + Emios_Pwm_Ip_GetUCRegB(Emios_Pwm_Ip_aBasePtr[Instance], Channel)) % Counte… in Emios_Pwm_Ip_IrqDaocHandler()
222 …Emios_Pwm_Ip_SetUCRegA(Emios_Pwm_Ip_aBasePtr[Instance], Channel, (DaocRegA == 0U)? CounterMax : Da… in Emios_Pwm_Ip_IrqDaocHandler()
224 …[eMios_Pwm_Ip_IndexInChState[Instance][Channel]] + Emios_Pwm_Ip_GetUCRegB(Emios_Pwm_Ip_aBasePtr[In… in Emios_Pwm_Ip_IrqDaocHandler()
225 …Emios_Pwm_Ip_SetUCRegB(Emios_Pwm_Ip_aBasePtr[Instance], Channel, (DaocRegB == 0U)? CounterMax : Da… in Emios_Pwm_Ip_IrqDaocHandler()
[all …]
/hal_nxp-latest/s32/drivers/s32ze/Pwm/src/
DEmios_Pwm_Ip.c294 uint8 Channel, in Emios_Pwm_Ip_SetOutputToNormalOpwfm() argument
304 …Emios_Pwm_Ip_SetPwmModePol(Base, Channel, Mode, (Polarity == EMIOS_PWM_IP_ACTIVE_HIGH) ? EMIOS_PWM… in Emios_Pwm_Ip_SetOutputToNormalOpwfm()
308 …Emios_Pwm_Ip_SetPwmModePol(Base, Channel, Mode, (Polarity == EMIOS_PWM_IP_ACTIVE_HIGH) ? EMIOS_PWM… in Emios_Pwm_Ip_SetOutputToNormalOpwfm()
311 Emios_Pwm_Ip_SetPwmMode(Base, Channel, Mode); in Emios_Pwm_Ip_SetOutputToNormalOpwfm()
315 …Emios_Pwm_Ip_SetPwmModePol(Base, Channel, Mode, (Polarity == EMIOS_PWM_IP_ACTIVE_HIGH) ? EMIOS_PWM… in Emios_Pwm_Ip_SetOutputToNormalOpwfm()
332 uint8 Channel, in Emios_Pwm_Ip_SetOutputToNormalOpwm() argument
345 …Emios_Pwm_Ip_SetPwmModePol(Base, Channel, Mode, (Polarity == EMIOS_PWM_IP_ACTIVE_HIGH) ? EMIOS_PWM… in Emios_Pwm_Ip_SetOutputToNormalOpwm()
349 …Emios_Pwm_Ip_SetPwmModePol(Base, Channel, Mode, (Polarity == EMIOS_PWM_IP_ACTIVE_HIGH) ? EMIOS_PWM… in Emios_Pwm_Ip_SetOutputToNormalOpwm()
352 Emios_Pwm_Ip_SetPwmMode(Base, Channel, Mode); in Emios_Pwm_Ip_SetOutputToNormalOpwm()
357 …Emios_Pwm_Ip_SetPwmModePol(Base, Channel, Mode, (Polarity == EMIOS_PWM_IP_ACTIVE_HIGH) ? EMIOS_PWM… in Emios_Pwm_Ip_SetOutputToNormalOpwm()
[all …]
DEmios_Pwm_Ip_Irq.c141 static void Emios_Pwm_Ip_IrqDaocHandler(uint8 Instance, uint8 Channel) in Emios_Pwm_Ip_IrqDaocHandler() argument
146 …Ip_GetUCRegA(Emios_Pwm_Ip_aBasePtr[Instance], Emios_Pwm_Ip_GetMasterBusChannel(Instance, Channel)); in Emios_Pwm_Ip_IrqDaocHandler()
147 …_Ip_PolarityType Polarity = Emios_Pwm_Ip_GetEdgePolarity(Emios_Pwm_Ip_aBasePtr[Instance], Channel); in Emios_Pwm_Ip_IrqDaocHandler()
148 boolean OutputPin = Emios_Pwm_Ip_GetOutputPinState(Emios_Pwm_Ip_aBasePtr[Instance], Channel); in Emios_Pwm_Ip_IrqDaocHandler()
150 uint8 ChannelIdx = Emios_Pwm_Ip_GetChannelIndex(Instance, Channel); in Emios_Pwm_Ip_IrqDaocHandler()
157 …DaocRegA = ((DaocDuty + Emios_Pwm_Ip_GetUCRegB(Emios_Pwm_Ip_aBasePtr[Instance], Channel)) % Counte… in Emios_Pwm_Ip_IrqDaocHandler()
159 …Emios_Pwm_Ip_SetUCRegA(Emios_Pwm_Ip_aBasePtr[Instance], Channel, (DaocRegA == 0U)? CounterMax : Da… in Emios_Pwm_Ip_IrqDaocHandler()
161 …eriod[ChannelIdx] + Emios_Pwm_Ip_GetUCRegB(Emios_Pwm_Ip_aBasePtr[Instance], Channel)) % CounterMax; in Emios_Pwm_Ip_IrqDaocHandler()
162 …Emios_Pwm_Ip_SetUCRegB(Emios_Pwm_Ip_aBasePtr[Instance], Channel, (DaocRegB == 0U)? CounterMax : Da… in Emios_Pwm_Ip_IrqDaocHandler()
170 …eriod[ChannelIdx] + Emios_Pwm_Ip_GetUCRegA(Emios_Pwm_Ip_aBasePtr[Instance], Channel)) % CounterMax; in Emios_Pwm_Ip_IrqDaocHandler()
[all …]
/hal_nxp-latest/s32/drivers/s32k3/Pwm/include/
DEmios_Pwm_Ip_HwAccess.h152 uint8 Channel, in Emios_Pwm_Ip_SetOutputUpdate() argument
155 Base->OUDIS = Base->OUDIS | (eMIOS_OUDIS_OU0((Value == TRUE) ? 0x00U : 0x01U) << Channel); in Emios_Pwm_Ip_SetOutputUpdate()
164 uint8 Channel) in Emios_Pwm_Ip_GetOutputUpdate() argument
166 …return (((Base->OUDIS & (uint32)((uint32)eMIOS_OUDIS_OU0_MASK << (uint32)Channel)) >> Channel) == … in Emios_Pwm_Ip_GetOutputUpdate()
186 uint8 Channel, in Emios_Pwm_Ip_SetChannelEnable() argument
189 Base->UCDIS = Base->UCDIS | (eMIOS_UCDIS_UCDIS0((Value == TRUE) ? 0x00U : 0x01U) << Channel); in Emios_Pwm_Ip_SetChannelEnable()
199 uint8 Channel) in Emios_Pwm_Ip_GetChannelEnable() argument
201 …Base->UCDIS & (uint32)((uint32)eMIOS_UCDIS_UCDIS0_MASK << (uint32)Channel)) >> Channel) == 0U) ? T… in Emios_Pwm_Ip_GetChannelEnable()
212 uint8 Channel, in Emios_Pwm_Ip_SetUCRegA() argument
215 Base->CH.UC[Channel].A = eMIOS_A_A(Value); in Emios_Pwm_Ip_SetUCRegA()
[all …]
DEmios_Pwm_Ip.h137 uint8 Channel);
149 uint8 Channel,
162 uint8 Channel,
174 uint8 Channel);
185 uint8 Channel,
196 uint8 Channel);
209 uint8 Channel,
220 uint8 Channel);
231 uint8 Channel,
242 uint8 Channel);
[all …]
DEmios_Pwm_Ip_Irq.h86 void Emios_Pwm_Ip_IrqHandler(uint8 Instance, uint8 Channel);
/hal_nxp-latest/s32/drivers/s32ze/Pwm/include/
DEmios_Pwm_Ip_HwAccess.h169 uint8 Channel, in Emios_Pwm_Ip_SetOutputUpdate() argument
173 Base->OUDIS = Base->OUDIS | (eMIOS_OUDIS_OU0((Value == TRUE) ? 0x00U : 0x01U) << Channel); in Emios_Pwm_Ip_SetOutputUpdate()
182 uint8 Channel in Emios_Pwm_Ip_GetOutputUpdate() argument
185 …return (((Base->OUDIS & (uint32)((uint32)eMIOS_OUDIS_OU0_MASK << (uint32)Channel)) >> Channel) == … in Emios_Pwm_Ip_GetOutputUpdate()
205 uint8 Channel, in Emios_Pwm_Ip_SetUCRegA() argument
209 Base->CH.UC[Channel].A = eMIOS_A_A(Value); in Emios_Pwm_Ip_SetUCRegA()
219 uint8 Channel in Emios_Pwm_Ip_GetUCRegA() argument
222 return (Emios_Pwm_Ip_PeriodType)((Base->CH.UC[Channel].A & eMIOS_A_A_MASK) >> eMIOS_A_A_SHIFT); in Emios_Pwm_Ip_GetUCRegA()
233 uint8 Channel, in Emios_Pwm_Ip_SetUCRegB() argument
237 Base->CH.UC[Channel].B = eMIOS_B_B(Value); in Emios_Pwm_Ip_SetUCRegB()
[all …]
DEmios_Pwm_Ip.h242 uint8 Channel
255 uint8 Channel,
269 uint8 Channel,
282 uint8 Channel
294 uint8 Channel,
306 uint8 Channel
320 uint8 Channel,
332 uint8 Channel
344 uint8 Channel,
356 uint8 Channel
[all …]
DEmios_Pwm_Ip_Irq.h85 void Emios_Pwm_Ip_IrqHandler(uint8 Instance, uint8 Channel);
/hal_nxp-latest/s32/drivers/s32ze/Mcl/src/
DEmios_Mcl_Ip_Irq.c595 static void Emios_Gpt_IrqHandler(const uint8 Instance, const uint8 Channel) in Emios_Gpt_IrqHandler() argument
598 if (0U != ((Emios_Ip_paxBase[Instance]->CH.UC[Channel].S) & (uint32)eMIOS_S_FLAG_MASK)) in Emios_Gpt_IrqHandler()
601 …if (0U != ((Emios_Ip_paxBase[Instance]->CH.UC[Channel].C) & ((uint32)(eMIOS_C_DMA_MASK | eMIOS_C_F… in Emios_Gpt_IrqHandler()
603 Emios_Gpt_Ip_IrqHandler(Instance, Channel); in Emios_Gpt_IrqHandler()
695 static void Emios_Icu_IrqHandler(const uint8 Instance, const uint8 Channel) in Emios_Icu_IrqHandler() argument
698 if (0U != ((Emios_Ip_paxBase[Instance]->CH.UC[Channel].S) & (uint32)eMIOS_S_FLAG_MASK)) in Emios_Icu_IrqHandler()
701 …if (0U != ((Emios_Ip_paxBase[Instance]->CH.UC[Channel].C) & ((uint32)(eMIOS_C_DMA_MASK | eMIOS_C_F… in Emios_Icu_IrqHandler()
703 Emios_Icu_Ip_IrqHandler(Instance, Channel); in Emios_Icu_IrqHandler()
795 static void Emios_Ocu_IrqHandler(const uint8 Instance, const uint8 Channel) in Emios_Ocu_IrqHandler() argument
798 if (0U != ((Emios_Ip_paxBase[Instance]->CH.UC[Channel].S) & (uint32)eMIOS_S_FLAG_MASK)) in Emios_Ocu_IrqHandler()
[all …]
DEmios_Mcl_Ip.c400 uint32 Emios_Mcl_Ip_GetCounterBusPeriod(uint8 Instance, uint8 Channel) in Emios_Mcl_Ip_GetCounterBusPeriod() argument
402 uint16 Emios_Mcl_Ip_GetCounterBusPeriod(uint8 Instance, uint8 Channel) in Emios_Mcl_Ip_GetCounterBusPeriod()
407 DevAssert(Channel < eMIOS_CH_UC_UC_COUNT); in Emios_Mcl_Ip_GetCounterBusPeriod()
411 uint32 PeriodCounterBus = Emios_Ip_ChPeriodMasterBus[Instance][Channel]; in Emios_Mcl_Ip_GetCounterBusPeriod()
413 uint16 PeriodCounterBus = Emios_Ip_ChPeriodMasterBus[Instance][Channel]; in Emios_Mcl_Ip_GetCounterBusPeriod()
/hal_nxp-latest/s32/drivers/s32k3/Eth_GMAC/src/
DGmac_Ip_Hw_Access.c472 uint8 Channel) in GMAC_RxIRQHandler() argument
474 Gmac_Ip_ChannelType *ChBase = Gmac_apxChBases[Instance][Channel]; in GMAC_RxIRQHandler()
489 if (Gmac_apxState[Instance]->RxChCallback[Channel] != NULL_PTR) in GMAC_RxIRQHandler()
491 Gmac_apxState[Instance]->RxChCallback[Channel](Instance, Channel); in GMAC_RxIRQHandler()
512 uint8 Channel) in GMAC_TxIRQHandler() argument
514 Gmac_Ip_ChannelType *ChBase = Gmac_apxChBases[Instance][Channel]; in GMAC_TxIRQHandler()
529 if (Gmac_apxState[Instance]->TxChCallback[Channel] != NULL_PTR) in GMAC_TxIRQHandler()
531 Gmac_apxState[Instance]->TxChCallback[Channel](Instance, Channel); in GMAC_TxIRQHandler()
DGmac_Ip.c2336 uint8 Channel) in Gmac_Ip_GetChInterruptFlags() argument
2342 Base = Gmac_apxChBases[Instance][Channel]; in Gmac_Ip_GetChInterruptFlags()
/hal_nxp-latest/s32/drivers/s32k3/Mcl/src/
DEmios_Mcl_Ip.c437 uint32 Emios_Mcl_Ip_GetCounterBusPeriod(uint8 Instance, uint8 Channel) in Emios_Mcl_Ip_GetCounterBusPeriod() argument
439 uint16 Emios_Mcl_Ip_GetCounterBusPeriod(uint8 Instance, uint8 Channel) in Emios_Mcl_Ip_GetCounterBusPeriod()
444 DevAssert(Channel < eMIOS_CH_UC_UC_COUNT); in Emios_Mcl_Ip_GetCounterBusPeriod()
448 uint32 PeriodCounterBus = Emios_Ip_ChPeriodMasterBus[Instance][Channel]; in Emios_Mcl_Ip_GetCounterBusPeriod()
450 uint16 PeriodCounterBus = Emios_Ip_ChPeriodMasterBus[Instance][Channel]; in Emios_Mcl_Ip_GetCounterBusPeriod()
/hal_nxp-latest/s32/drivers/s32ze/Mcl/include/
DEmios_Mcl_Ip.h217 uint32 Emios_Mcl_Ip_GetCounterBusPeriod(uint8 Instance, uint8 Channel);
219 uint16 Emios_Mcl_Ip_GetCounterBusPeriod(uint8 Instance, uint8 Channel);
/hal_nxp-latest/s32/drivers/s32k3/Mcl/include/
DEmios_Mcl_Ip.h234 uint32 Emios_Mcl_Ip_GetCounterBusPeriod(uint8 Instance, uint8 Channel);
236 uint16 Emios_Mcl_Ip_GetCounterBusPeriod(uint8 Instance, uint8 Channel);
/hal_nxp-latest/s32/drivers/s32k3/Eth_GMAC/include/
DGmac_Ip_Hw_Access.h252 uint8 Channel);
264 uint8 Channel);
DGmac_Ip.h520 uint8 Channel);
DGmac_Ip_Types.h502 typedef void (*Gmac_Ip_ChCallbackType)(const uint8 Instance, const uint8 Channel);
/hal_nxp-latest/mcux/mcux-sdk/components/rtt/
DREADME.txt10 - Main_RTT_InputEchoApp.c - Sample application which echoes input on Channel 0.
/hal_nxp-latest/mcux/middleware/wifi_nxp/wifidriver/incl/
Dmlan_api.h526 uint8_t *Channel,
/hal_nxp-latest/mcux/middleware/wifi_nxp/incl/wifidriver/
Dwifi-decl.h296 uint8_t Channel; /*!< Channel associated to the BSSID */ member
/hal_nxp-latest/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c170 static uint64 Clock_Ip_Get_DFS_OUTPUT(const DFS_Type *Base, uint32 Channel, uint64 Fin);
4220 static uint64 Clock_Ip_Get_DFS_OUTPUT(const DFS_Type *Base, uint32 Channel, uint64 Fin) in Clock_Ip_Get_DFS_OUTPUT() argument
4230 …Mfi = ((Base->DVPORT[Channel] & DFS_DVPORT_MFI_MASK) >> DFS_DVPORT_MFI_SHIFT); /* Mfi… in Clock_Ip_Get_DFS_OUTPUT()
4231 …Mfn = ((Base->DVPORT[Channel] & DFS_DVPORT_MFN_MASK) >> DFS_DVPORT_MFN_SHIFT); /* Mfn… in Clock_Ip_Get_DFS_OUTPUT()
/hal_nxp-latest/mcux/middleware/wifi_nxp/wlcmgr/
Dwlan.c1475 if (network->channel_specific && network->channel != res->Channel) in network_matches_scan_result()
1477 …wlcm_d("%s: Channel mismatch. Got: %d Expected: %d", network->ssid, res->Channel, network->channel… in network_matches_scan_result()
1490 chan_list[*num_channels].chan_number = res->Channel; in network_matches_scan_result()
1533 if (!wifi_11d_is_channel_allowed((int)res->Channel)) in network_matches_scan_result()
1535 wlcm_d("%d: Channel not allowed.", res->Channel); in network_matches_scan_result()
2447 network->channel = res->Channel; in update_network_params()
2681 wlcm_d("Found better AP %s on channel %d", res->ssid, res->Channel); in handle_scan_results()
10799 res->channel = desc->Channel; in wlan_get_scan_result()

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