1 /* 2 * Copyright 2021-2024 NXP 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef EMIOS_PWM_IP_H 8 #define EMIOS_PWM_IP_H 9 10 /** 11 * @file Emios_Pwm_Ip.h 12 * 13 * @addtogroup emios_pwm_ip Emios Pwm IPL 14 * @{ 15 */ 16 17 #ifdef __cplusplus 18 extern "C"{ 19 #endif 20 21 22 /*================================================================================================== 23 * INCLUDE FILES 24 * 1) system and project includes 25 * 2) needed interfaces from external units 26 * 3) internal and external interfaces from this unit 27 ==================================================================================================*/ 28 #include "Std_Types.h" 29 #include "Emios_Pwm_Ip_Cfg.h" 30 #include "Emios_Pwm_Ip_Types.h" 31 32 /*================================================================================================== 33 * SOURCE FILE VERSION INFORMATION 34 ==================================================================================================*/ 35 #define EMIOS_PWM_IP_VENDOR_ID 43 36 #define EMIOS_PWM_IP_MODULE_ID 121 37 #define EMIOS_PWM_IP_AR_RELEASE_MAJOR_VERSION 4 38 #define EMIOS_PWM_IP_AR_RELEASE_MINOR_VERSION 7 39 #define EMIOS_PWM_IP_AR_RELEASE_REVISION_VERSION 0 40 #define EMIOS_PWM_IP_SW_MAJOR_VERSION 2 41 #define EMIOS_PWM_IP_SW_MINOR_VERSION 0 42 #define EMIOS_PWM_IP_SW_PATCH_VERSION 0 43 44 /*================================================================================================== 45 * FILE VERSION CHECKS 46 ==================================================================================================*/ 47 #ifndef DISABLE_MCAL_INTERMODULE_ASR_CHECK 48 /* Check if header file and Std_Types.h are of the same AUTOSAR version */ 49 #if ((EMIOS_PWM_IP_AR_RELEASE_MAJOR_VERSION != STD_AR_RELEASE_MAJOR_VERSION) || \ 50 (EMIOS_PWM_IP_AR_RELEASE_MINOR_VERSION != STD_AR_RELEASE_MINOR_VERSION)) 51 #error "AUTOSAR Version Numbers of Emios_Pwm_Ip.h and Std_Types.h are different" 52 #endif 53 #endif 54 55 /* Check if header file and Emios_Pwm_Ip_Cfg header file are of the same vendor */ 56 #if (EMIOS_PWM_IP_VENDOR_ID != EMIOS_PWM_IP_CFG_VENDOR_ID) 57 #error "Vendor IDs of Emios_Pwm_Ip.h and Emios_Pwm_Ip_Cfg.h are different." 58 #endif 59 60 /* Check if header file and Emios_Pwm_Ip_Cfg header file are of the same AUTOSAR version */ 61 #if ((EMIOS_PWM_IP_AR_RELEASE_MAJOR_VERSION != EMIOS_PWM_IP_CFG_AR_RELEASE_MAJOR_VERSION) || \ 62 (EMIOS_PWM_IP_AR_RELEASE_MINOR_VERSION != EMIOS_PWM_IP_CFG_AR_RELEASE_MINOR_VERSION) || \ 63 (EMIOS_PWM_IP_AR_RELEASE_REVISION_VERSION != EMIOS_PWM_IP_CFG_AR_RELEASE_REVISION_VERSION)) 64 #error "AUTOSAR version numbers of Emios_Pwm_Ip.h and Emios_Pwm_Ip_Cfg.h are different." 65 #endif 66 67 /* Check if header file and Emios_Pwm_Ip_Cfg header file are of the same software version */ 68 #if ((EMIOS_PWM_IP_SW_MAJOR_VERSION != EMIOS_PWM_IP_CFG_SW_MAJOR_VERSION) || \ 69 (EMIOS_PWM_IP_SW_MINOR_VERSION != EMIOS_PWM_IP_CFG_SW_MINOR_VERSION) || \ 70 (EMIOS_PWM_IP_SW_PATCH_VERSION != EMIOS_PWM_IP_CFG_SW_PATCH_VERSION)) 71 #error "Software version numbers of Emios_Pwm_Ip.h and Emios_Pwm_Ip_Cfg.h are different." 72 #endif 73 74 /* Check if header file and Emios_Pwm_Ip_Types header file are of the same vendor */ 75 #if (EMIOS_PWM_IP_VENDOR_ID != EMIOS_PWM_IP_TYPES_VENDOR_ID) 76 #error "Vendor IDs of Emios_Pwm_Ip.h and Emios_Pwm_Ip_Types.h are different." 77 #endif 78 79 /* Check if header file and Emios_Pwm_Ip_Types header file are of the same AUTOSAR version */ 80 #if ((EMIOS_PWM_IP_AR_RELEASE_MAJOR_VERSION != EMIOS_PWM_IP_TYPES_AR_RELEASE_MAJOR_VERSION) || \ 81 (EMIOS_PWM_IP_AR_RELEASE_MINOR_VERSION != EMIOS_PWM_IP_TYPES_AR_RELEASE_MINOR_VERSION) || \ 82 (EMIOS_PWM_IP_AR_RELEASE_REVISION_VERSION != EMIOS_PWM_IP_TYPES_AR_RELEASE_REVISION_VERSION)) 83 #error "AUTOSAR version numbers of Emios_Pwm_Ip.h and Emios_Pwm_Ip_Types.h are different." 84 #endif 85 86 /* Check if header file and Emios_Pwm_Ip_Types header file are of the same software version */ 87 #if ((EMIOS_PWM_IP_SW_MAJOR_VERSION != EMIOS_PWM_IP_TYPES_SW_MAJOR_VERSION) || \ 88 (EMIOS_PWM_IP_SW_MINOR_VERSION != EMIOS_PWM_IP_TYPES_SW_MINOR_VERSION) || \ 89 (EMIOS_PWM_IP_SW_PATCH_VERSION != EMIOS_PWM_IP_TYPES_SW_PATCH_VERSION)) 90 #error "Software version numbers of Emios_Pwm_Ip.h and Emios_Pwm_Ip_Types.h are different." 91 #endif 92 93 /*================================================================================================== 94 * CONSTANTS 95 ==================================================================================================*/ 96 97 /*================================================================================================== 98 * DEFINES AND MACROS 99 ==================================================================================================*/ 100 101 /*================================================================================================== 102 * ENUMS 103 ==================================================================================================*/ 104 105 /*================================================================================================== 106 * STRUCTURES AND OTHER TYPEDEFS 107 ==================================================================================================*/ 108 109 /*================================================================================================== 110 * GLOBAL VARIABLE DECLARATIONS 111 ==================================================================================================*/ 112 #if (EMIOS_PWM_IP_USED == STD_ON) 113 114 #if (EMIOS_PWM_IP_NO_CACHE_NEEDED == STD_ON) 115 #define PWM_START_SEC_VAR_CLEARED_8_NO_CACHEABLE 116 #else 117 #define PWM_START_SEC_VAR_CLEARED_8 118 #endif 119 #include "Pwm_MemMap.h" 120 121 /** @brief Arrays to check the state of Channel is initial state or uninitialized state or idle state */ 122 extern uint8 Emios_Pwm_Ip_aCheckState[EMIOS_PWM_IP_NUM_OF_CHANNELS_USED_U8]; 123 124 /** @brief Arrays to check the state of Channel in the notification or not */ 125 extern uint8 Emios_Pwm_Ip_aCheckEnableNotif[EMIOS_PWM_IP_NUM_OF_CHANNELS_USED_U8]; 126 127 #if (EMIOS_PWM_IP_NO_CACHE_NEEDED == STD_ON) 128 #define PWM_STOP_SEC_VAR_CLEARED_8_NO_CACHEABLE 129 #else 130 #define PWM_STOP_SEC_VAR_CLEARED_8 131 #endif 132 #include "Pwm_MemMap.h" 133 134 135 #if (EMIOS_PWM_IP_NO_CACHE_NEEDED == STD_ON) 136 #define PWM_START_SEC_VAR_INIT_UNSPECIFIED_NO_CACHEABLE 137 #else 138 #define PWM_START_SEC_VAR_INIT_UNSPECIFIED 139 #endif 140 #include "Pwm_MemMap.h" 141 142 /* Array with current pwm modes for each Emios Channel */ 143 extern Emios_Pwm_Ip_PwmModeType Emios_Pwm_Ip_aCurrentModes[EMIOS_PWM_IP_NUM_OF_CHANNELS_USED_U8]; 144 145 #if (EMIOS_PWM_IP_NO_CACHE_NEEDED == STD_ON) 146 #define PWM_STOP_SEC_VAR_INIT_UNSPECIFIED_NO_CACHEABLE 147 #else 148 #define PWM_STOP_SEC_VAR_INIT_UNSPECIFIED 149 #endif 150 #include "Pwm_MemMap.h" 151 152 153 #if (EMIOS_PWM_IP_NO_CACHE_NEEDED == STD_ON) 154 #define PWM_START_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE 155 #else 156 #define PWM_START_SEC_VAR_CLEARED_UNSPECIFIED 157 #endif 158 #include "Pwm_MemMap.h" 159 160 /** @brief Array with notification handlers for all configurable channels */ 161 extern Emios_Pwm_Ip_NotificationType const *Emios_Pwm_Ip_aNotificationPtr[EMIOS_PWM_IP_NUM_OF_CHANNELS_USED_U8]; 162 163 #if (EMIOS_PWM_IP_NO_CACHE_NEEDED == STD_ON) 164 #define PWM_STOP_SEC_VAR_CLEARED_UNSPECIFIED_NO_CACHEABLE 165 #else 166 #define PWM_STOP_SEC_VAR_CLEARED_UNSPECIFIED 167 #endif 168 #include "Pwm_MemMap.h" 169 170 171 #ifdef EMIOS_PWM_IP_TIMER_WIDTH_24BITS 172 #if (EMIOS_PWM_IP_NO_CACHE_NEEDED == STD_ON) 173 #define PWM_START_SEC_VAR_CLEARED_32_NO_CACHEABLE 174 #else 175 #define PWM_START_SEC_VAR_CLEARED_32 176 #endif 177 #else 178 #if (EMIOS_PWM_IP_NO_CACHE_NEEDED == STD_ON) 179 #define PWM_START_SEC_VAR_CLEARED_16_NO_CACHEABLE 180 #else 181 #define PWM_START_SEC_VAR_CLEARED_16 182 #endif 183 #endif 184 #include "Pwm_MemMap.h" 185 186 /** @brief Array with period for all channels */ 187 extern Emios_Pwm_Ip_PeriodType Emios_Pwm_Ip_aPeriod[EMIOS_PWM_IP_NUM_OF_CHANNELS_USED_U8]; 188 189 /** @brief Array with duty cycle for all channels */ 190 extern Emios_Pwm_Ip_DutyType Emios_Pwm_Ip_aDutyCycle[EMIOS_PWM_IP_NUM_OF_CHANNELS_USED_U8]; 191 192 #ifdef EMIOS_PWM_IP_TIMER_WIDTH_24BITS 193 #if (EMIOS_PWM_IP_NO_CACHE_NEEDED == STD_ON) 194 #define PWM_STOP_SEC_VAR_CLEARED_32_NO_CACHEABLE 195 #else 196 #define PWM_STOP_SEC_VAR_CLEARED_32 197 #endif 198 #else 199 #if (EMIOS_PWM_IP_NO_CACHE_NEEDED == STD_ON) 200 #define PWM_STOP_SEC_VAR_CLEARED_16_NO_CACHEABLE 201 #else 202 #define PWM_STOP_SEC_VAR_CLEARED_16 203 #endif 204 #endif 205 #include "Pwm_MemMap.h" 206 207 208 #define PWM_START_SEC_CONST_UNSPECIFIED 209 #include "Pwm_MemMap.h" 210 211 /** @brief Array with base addresses for Emios instances available on platform */ 212 extern Emios_Pwm_Ip_HwAddrType *const Emios_Pwm_Ip_aBasePtr[EMIOS_PWM_IP_INSTANCE_COUNT]; 213 214 #define PWM_STOP_SEC_CONST_UNSPECIFIED 215 #include "Pwm_MemMap.h" 216 217 /*================================================================================================== 218 * FUNCTION PROTOTYPES 219 ==================================================================================================*/ 220 #define PWM_START_SEC_CODE 221 #include "Pwm_MemMap.h" 222 223 /** 224 * @brief Initialize PWM Mode 225 * 226 * @param[in] Instance The eMIOS group id 227 * @param[in] UserChCfg A pointer to the PWM configuration structure 228 * @return void 229 */ 230 void Emios_Pwm_Ip_InitChannel(uint8 Instance, 231 Emios_Pwm_Ip_ChannelConfigType const *UserChCfg 232 ); 233 234 /** 235 * @brief Reset eMIOS Channel to GPIO mode (reset default) 236 * 237 * @param[in] Instance The eMIOS group id 238 * @param[in] Channel The Channel in this eMIOS group 239 * @return void 240 */ 241 void Emios_Pwm_Ip_DeInitChannel(uint8 Instance, 242 uint8 Channel 243 ); 244 245 /** 246 * @brief Allow the software to force the output flip-flop to the level corresponding 247 * to a match on leading edge. The FLAG bit is not set. 248 * 249 * @param[in] Instance The eMIOS group id 250 * @param[in] Channel The Channel in this eMIOS group 251 * @param[in] Enable The Channel in Force Match Leading Edge or not 252 * @return void 253 */ 254 void Emios_Pwm_Ip_ForceMatchLeadingEdge(uint8 Instance, 255 uint8 Channel, 256 boolean Enable 257 ); 258 259 /** 260 * @brief Allow the software to force the output flip-flop to the level corresponding 261 * to a match on trailing edge. The FLAG bit is not set. 262 * 263 * @param[in] Instance The eMIOS group id 264 * @param[in] Channel The Channel in this eMIOS group 265 * @param[in] Enable The Channel in Force Match Leading Edge or not 266 * @return void 267 */ 268 void Emios_Pwm_Ip_ForceMatchTrailingEdge(uint8 Instance, 269 uint8 Channel, 270 boolean Enable 271 ); 272 273 /** 274 * @brief Get Period value in PWM mode 275 * 276 * @param[in] Instance The eMIOS group id 277 * @param[in] Channel The Channel in this eMIOS group 278 * @param[out] RetPeriod A pointer to return period value 279 * @return Emios_Pwm_Ip_PeriodType Value of period 280 */ 281 Emios_Pwm_Ip_PeriodType Emios_Pwm_Ip_GetPeriod(uint8 Instance, 282 uint8 Channel 283 ); 284 285 /** 286 * @brief Set new Period value in PWM mode 287 * 288 * @param[in] Instance The eMIOS group id 289 * @param[in] Channel The Channel in this eMIOS group 290 * @param[in] NewPeriod New Period value 291 * @return void 292 */ 293 void Emios_Pwm_Ip_SetPeriod(uint8 Instance, 294 uint8 Channel, 295 Emios_Pwm_Ip_PeriodType NewPeriod 296 ); 297 298 /** 299 * @brief Get Duty Cycle value in PWM mode 300 * 301 * @param[in] Instance The eMIOS group id 302 * @param[in] Channel The Channel in this eMIOS group 303 * @return Emios_Pwm_Ip_DutyType Value of duty cycle 304 */ 305 Emios_Pwm_Ip_DutyType Emios_Pwm_Ip_GetDutyCycle(uint8 Instance, 306 uint8 Channel 307 ); 308 309 /** 310 * @brief Set new Duty Cycle value in PWM mode 311 * 312 * @param[in] Instance The eMIOS group id 313 * @param[in] Channel The Channel in this eMIOS group 314 * @param[in] NewDutyCycle New duty cycle value 315 * @return operation status 316 * - EMIOS_PWM_IP_STATUS_SUCCESS : Operation was successful. 317 * - EMIOS_PWM_IP_STATUS_ERROR : Operation failed, invalid input value. 318 */ 319 Emios_Pwm_Ip_StatusType Emios_Pwm_Ip_SetDutyCycle(uint8 Instance, 320 uint8 Channel, 321 Emios_Pwm_Ip_DutyType NewDutyCycle 322 ); 323 324 /** 325 * @brief Get Leading Edge Placement value in PWM mode 326 * 327 * @param[in] Instance The eMIOS group id 328 * @param[in] Channel The Channel in this eMIOS group 329 * @return Emios_Pwm_Ip_PeriodType Value of leading edge placement in counter bus time base 330 */ 331 Emios_Pwm_Ip_PeriodType Emios_Pwm_Ip_GetPhaseShift(uint8 Instance, 332 uint8 Channel 333 ); 334 335 /** 336 * @brief Set new Leading edge placement value in PWM mode 337 * 338 * @param[in] Instance The eMIOS group id 339 * @param[in] Channel The Channel in this eMIOS group 340 * @param[in] PhaseShift New Phase Shift value 341 * @return void 342 */ 343 Emios_Pwm_Ip_StatusType Emios_Pwm_Ip_SetPhaseShift(uint8 Instance, 344 uint8 Channel, 345 Emios_Pwm_Ip_DutyType PhaseShift 346 ); 347 348 /** 349 * @brief Get dead time value in PWM mode 350 * 351 * @param[in] Instance The eMIOS group id 352 * @param[in] Channel The Channel in this eMIOS group 353 * @return Emios_Pwm_Ip_PeriodType Value of Dead Time 354 */ 355 Emios_Pwm_Ip_PeriodType Emios_Pwm_Ip_GetDeadTime(uint8 Instance, 356 uint8 Channel 357 ); 358 359 /** 360 * @brief Set new dead time value in PWM mode 361 * 362 * @param[in] Instance The eMIOS group id 363 * @param[in] Channel The Channel in this eMIOS group 364 * @param[in] NewDeadTime New Dead Time value 365 * @return void 366 */ 367 void Emios_Pwm_Ip_SetDeadTime(uint8 Instance, 368 uint8 Channel, 369 Emios_Pwm_Ip_PeriodType NewDeadTime 370 ); 371 372 /** 373 * @brief Get Trigger Placement value in PWM mode 374 * 375 * @param[in] Instance The eMIOS group id 376 * @param[in] Channel The Channel in this eMIOS group 377 * @return uint32 Value of Trigger Placement 378 */ 379 uint32 Emios_Pwm_Ip_GetTriggerPlacement(uint8 Instance, 380 uint8 Channel 381 ); 382 383 /** 384 * @brief Set new Trigger Placement value in PWM mode 385 * 386 * @param[in] Instance The eMIOS group id 387 * @param[in] Channel The Channel in this eMIOS group 388 * @param[in] NewTriggerPlacement New Trigger Placement value 389 * @return void 390 */ 391 void Emios_Pwm_Ip_SetTriggerPlacement(uint8 Instance, 392 uint8 Channel, 393 Emios_Pwm_Ip_PeriodType NewTriggerPlacement 394 ); 395 396 /** 397 * @brief Set a Channel enters freeze state, should be setting 398 * EMIOS_AllowEnterDebugMode first. 399 * 400 * @param[in] Instance The eMIOS group id 401 * @param[in] Channel The Channel in this eMIOS group 402 * @return operation status 403 * - EMIOS_PWM_IP_STATUS_SUCCESS : Operation was successful. 404 * - EMIOS_PWM_IP_STATUS_ERROR : Operation failed, invalid input value. 405 * - EMIOS_PWM_IP_STATUS_ENABLE_GLOBAL_FRZ : Need call EMIOS_AllowEnterDebugMode first. 406 */ 407 Emios_Pwm_Ip_StatusType Emios_Pwm_Ip_ChannelEnterDebugMode(uint8 Instance, 408 uint8 Channel 409 ); 410 411 /** 412 * @brief Release a Channel from freeze state 413 * 414 * @param[in] Instance The eMIOS group id 415 * @param[in] Channel The Channel in this eMIOS group 416 * @return void 417 */ 418 void Emios_Pwm_Ip_ChannelStopDebugMode(uint8 Instance, 419 uint8 Channel 420 ); 421 422 /** 423 * @brief Get the Unified Channel FLAG event generated. Interrupt or DMA request. 424 * 425 * @param[in] Instance The eMIOS group id 426 * @param[in] Channel The Channel in this eMIOS group 427 * @return The FLAG event response type 428 */ 429 Emios_Pwm_Ip_InterruptType Emios_Pwm_Ip_GetFlagRequest(uint8 Instance, 430 uint8 Channel 431 ); 432 433 /** 434 * @brief Allow the Unified Channel FLAG bit to generate an interrupt signal or 435 * a DMA request signal 436 * 437 * @param[in] Instance The eMIOS group id 438 * @param[in] Channel The Channel in this eMIOS group 439 * @param[in] Event The FLAG event response type 440 * @return void 441 */ 442 void Emios_Pwm_Ip_SetFlagRequest(uint8 Instance, 443 uint8 Channel, 444 Emios_Pwm_Ip_InterruptType Event 445 ); 446 447 /** 448 * @brief Get the Unified Channel output pin logic level 449 * 450 * @param[in] Instance The eMIOS group id 451 * @param[in] Channel The Channel in this eMIOS group 452 * @return The Emios Channel output pin state HIGH/LOW 453 */ 454 Emios_Pwm_Ip_OutputStateType Emios_Pwm_Ip_GetOutputState(uint8 Instance, 455 uint8 Channel 456 ); 457 458 /** 459 * @brief Set the state of output pin 460 * 461 * @param[in] Instance The eMIOS group id 462 * @param[in] Channel The Channel in this eMIOS group 463 * @param[in] OutputState The state of output pin 464 * @return void 465 */ 466 void Emios_Pwm_Ip_SetOutputState(uint8 Instance, 467 uint8 Channel, 468 Emios_Pwm_Ip_OutputStateType OutputState 469 ); 470 471 /** 472 * @brief Set the polarity and mode for current Channel as normal 473 * 474 * @param[in] Instance The eMIOS group id 475 * @param[in] Channel The Channel in this eMIOS group 476 * @param[in] DutyPercent The range of duty cycle value :0x00(0%) ->0x8000(100%) 477 * @param[in] Polarity The polarity of Channel 478 * @param[in] Mode Mode of Channel 479 * @return void 480 */ 481 void Emios_Pwm_Ip_SetOutputToNormal(uint8 Instance, 482 uint8 Channel, 483 uint16 DutyPercent, 484 Emios_Pwm_Ip_PolarityType Polarity, 485 Emios_Pwm_Ip_PwmModeType Mode 486 ); 487 488 /** 489 * @brief Get mode of operation of the Unified Channel 490 * 491 * @param[in] Instance The eMIOS group id 492 * @param[in] Channel The Channel in this eMIOS group 493 * @return Emios_Pwm_Ip_PwmModeType 494 */ 495 Emios_Pwm_Ip_PwmModeType Emios_Pwm_Ip_GetChannelMode(uint8 Instance, 496 uint8 Channel 497 ); 498 499 /** 500 * @brief Get master bus Channel 501 * 502 * @param[in] Instance The eMIOS group id 503 * @param[in] Channel The Channel in this eMIOS group 504 * @return Emios_Pwm_Ip_PwmModeType 505 */ 506 uint8 Emios_Pwm_Ip_GetMasterBusChannel(uint8 Instance, 507 uint8 Channel 508 ); 509 510 /** 511 * @brief Set Prescaler Enable bit. 512 * 513 * @param[in] Instance The eMIOS group id 514 * @param[in] Channel The Channel in this eMIOS group 515 * @param[in] Value The value to set 516 * - 0 Prescaler disabled (no clock) 517 * - 1 Prescaler enabled 518 * @return void 519 */ 520 void Emios_Pwm_Ip_SetPreEnableClock(uint8 Instance, 521 uint8 Channel, 522 boolean Value 523 ); 524 525 /** 526 * @brief Set Bus Select bits. 527 * 528 * @param[in] Instance The eMIOS group id 529 * @param[in] Channel The Channel in this eMIOS group 530 * @param[in] Value The value to set 531 * @return void 532 */ 533 void Emios_Pwm_Ip_SetBusSelected(uint8 Instance, 534 uint8 Channel, 535 Emios_Pwm_Ip_CounterBusSourceType Value 536 ); 537 538 /** 539 * @brief This function set the value of the prescaler on eMios channels 540 * 541 * @param[in] Instance The eMIOS group id 542 * @param[in] Channel The Channel in this eMIOS group 543 * @param[in] Value The value to set 544 * @return void 545 */ 546 void Emios_Pwm_Ip_SetClockPs(uint8 Instance, 547 uint8 Channel, 548 Emios_Pwm_Ip_InternalClkPsType Value 549 ); 550 551 /** 552 * @brief The function shall Enable the output update for the corresponding Channel. 553 * 554 * @param[in] Instance Instance of EMIOS used. 555 * @param[in] ChannelMask EMIOS hardware mask Channel used. 556 */ 557 void Emios_Pwm_Ip_ComparatorTransferEnable(uint8 Instance, uint32 ChannelMask); 558 559 /** 560 * @brief The function shall disable the output update for the corresponding Channel. 561 * 562 * @param[in] Instance Instance of EMIOS used. 563 * @param[in] ChannelMask EMIOS hardware mask Channel used. 564 */ 565 void Emios_Pwm_Ip_ComparatorTransferDisable(uint8 Instance, uint32 ChannelMask); 566 567 /** 568 * @brief This function updates the duty cycle and-or period for the specified PWM Channel. 569 * The value written does not take effect until calling SyncUpdate API. 570 * 571 * @param Instance eMIOS hardware module index 572 * 573 * @return void 574 * 575 */ 576 void Emios_Pwm_Ip_SyncUpdate(uint8 Instance); 577 578 /** 579 * @brief This function updates the value of UCRegA. It may be used to change duty cycle or phase shift 580 * with minimum overhead. 581 * 582 * @param Instance eMIOS hardware module index 583 * @param Channel The Channel in this eMIOS group 584 * @param Value The value to set 585 * 586 * @return void 587 * 588 */ 589 void Emios_Pwm_Ip_UpdateUCRegA(uint8 Instance, uint8 Channel, Emios_Pwm_Ip_PeriodType Value); 590 591 /** 592 * @brief This function updates the value of UCRegB. It may be used to change duty cycle, phase shift or 593 * inserted dead time buffer with minimum overhead. 594 * 595 * @param Instance eMIOS hardware module index 596 * @param Channel The Channel in this eMIOS group 597 * @param Value The value to set 598 * 599 * @return void 600 * 601 */ 602 void Emios_Pwm_Ip_UpdateUCRegB(uint8 Instance, uint8 Channel, Emios_Pwm_Ip_PeriodType Value); 603 604 605 #define PWM_STOP_SEC_CODE 606 #include "Pwm_MemMap.h" 607 608 #endif /* EMIOS_PWM_IP_USED == STD_ON */ 609 610 #ifdef __cplusplus 611 } 612 #endif 613 614 /** @} */ 615 616 #endif /* EMIOS_PWM_IP_H */ 617
