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Searched refs:kSCG_SysPllEnable (Results 1 – 15 of 15) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/boards/twrke18f/
Dclock_config.c187 .enableMode = kSCG_SysPllEnable, /* Enable SPLL clock */
299 .enableMode = kSCG_SysPllEnable, /* Enable SPLL clock */
419 .enableMode = kSCG_SysPllEnable, /* Enable SPLL clock */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/twrke18f/project_template/
Dclock_config.c194 .enableMode = kSCG_SysPllEnable, /* Enable SPLL clock */
305 .enableMode = kSCG_SysPllEnable, /* Enable SPLL clock */
434 .enableMode = kSCG_SysPllEnable, /* Enable SPLL clock */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l2a4s/project_template/
Dclock_config.c231 .enableMode = kSCG_SysPllEnable, /* Enable SPLL clock */
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmcimx7ulp/project_template/
Dclock_config.c75 const scg_spll_config_t g_scgSysPllConfig = {.enableMode = kSCG_SysPllEnable,
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/frdmk32l2a4s/
Dclock_config.c349 .enableMode = kSCG_SysPllEnable, /* Enable SPLL clock */
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/project_template/
Dclock_config.c75 const scg_spll_config_t g_scgSysPllConfig = {.enableMode = kSCG_SysPllEnable,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/project_template/
Dclock_config.c75 const scg_spll_config_t g_scgSysPllConfig = {.enableMode = kSCG_SysPllEnable,
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmcimx7ulp/
Dclock_config.c65 const scg_spll_config_t g_scgSysPllConfig = {.enableMode = kSCG_SysPllEnable,
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/drivers/
Dfsl_clock.h605 kSCG_SysPllEnable = SCG_SPLLCSR_SPLLEN_MASK, /*!< Enable SPLL clock. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE18F16/drivers/
Dfsl_clock.h611 kSCG_SysPllEnable = SCG_SPLLCSR_SPLLEN_MASK, /*!< Enable SPLL clock. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE16F16/drivers/
Dfsl_clock.h611 kSCG_SysPllEnable = SCG_SPLLCSR_SPLLEN_MASK, /*!< Enable SPLL clock. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A41A/drivers/
Dfsl_clock.h609 kSCG_SysPllEnable = SCG_SPLLCSR_SPLLEN_MASK, /*!< Enable SPLL clock. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/K32L2A31A/drivers/
Dfsl_clock.h609 kSCG_SysPllEnable = SCG_SPLLCSR_SPLLEN_MASK, /*!< Enable SPLL clock. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U3/drivers/
Dfsl_clock.h765 kSCG_SysPllEnable = SCG_SPLLCSR_SPLLEN_MASK, /*!< Enable SPLL clock. */ enumerator
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MCIMX7U5/drivers/
Dfsl_clock.h765 kSCG_SysPllEnable = SCG_SPLLCSR_SPLLEN_MASK, /*!< Enable SPLL clock. */ enumerator