| /hal_nxp-3.5.0/s32/drivers/s32ze/Uart/include/ |
| D | Linflexd_Uart_Ip_HwAccess.h | 298 static inline void Linflexd_Uart_Ip_EnableMonitorIdleState(LINFLEXD_Type *Base, boolean Enable) in Linflexd_Uart_Ip_EnableMonitorIdleState() argument
300 Base->UARTCR |= LINFLEXD_UARTCR_MIS(Enable); in Linflexd_Uart_Ip_EnableMonitorIdleState()
314 static inline void Linflexd_Uart_Ip_EnableTimerReset(LINFLEXD_Type *Base, boolean Enable) in Linflexd_Uart_Ip_EnableTimerReset() argument
316 Base->UARTCR |= LINFLEXD_UARTCR_DTU_PCETX(Enable); in Linflexd_Uart_Ip_EnableTimerReset()
377 static inline void Linflexd_Uart_Ip_SetParityControl(LINFLEXD_Type *Base, boolean Enable) in Linflexd_Uart_Ip_SetParityControl() argument
383 RegValTemp |= LINFLEXD_UARTCR_PCE(Enable ? 1UL : 0UL); in Linflexd_Uart_Ip_SetParityControl()
423 static inline void Linflexd_Uart_Ip_SetTransmitterState(LINFLEXD_Type *Base, boolean Enable) in Linflexd_Uart_Ip_SetTransmitterState() argument
430 RegValTemp |= LINFLEXD_UARTCR_TxEn(Enable ? 1UL : 0UL); in Linflexd_Uart_Ip_SetTransmitterState()
445 static inline void Linflexd_Uart_Ip_SetReceiverState(LINFLEXD_Type *Base, boolean Enable) in Linflexd_Uart_Ip_SetReceiverState() argument
452 RegValTemp |= LINFLEXD_UARTCR_RxEn(Enable ? 1UL : 0UL); in Linflexd_Uart_Ip_SetReceiverState()
[all …]
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| /hal_nxp-3.5.0/s32/drivers/s32k3/Eth_GMAC/include/ |
| D | Gmac_Ip.h | 530 boolean Enable);
541 boolean Enable);
558 boolean Enable);
575 boolean Enable);
594 boolean Enable);
651 boolean Enable);
666 boolean Enable);
733 boolean Enable,
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| D | Gmac_Ip_Hw_Access.h | 381 void GMAC_SetVlanTagInvMatch(GMAC_Type * Base, boolean Enable);
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| /hal_nxp-3.5.0/s32/drivers/s32k3/Fls/include/ |
| D | Qspi_Ip_HwAccess.h | 275 boolean Enable in Qspi_Ip_DLLSlaveEnA() argument
281 RegValue |= QuadSPI_DLLCRA_SLV_EN(Enable? 1U : 0U); in Qspi_Ip_DLLSlaveEnA()
289 boolean Enable in Qspi_Ip_DLLSlaveUpdateA() argument
295 RegValue |= QuadSPI_DLLCRA_SLV_UPD(Enable? 1U : 0U); in Qspi_Ip_DLLSlaveUpdateA()
304 boolean Enable in Qspi_Ip_DLLEnableA() argument
310 RegValue |= QuadSPI_DLLCRA_DLLEN(Enable? 1U : 0U); in Qspi_Ip_DLLEnableA()
319 boolean Enable in Qspi_Ip_DLLSlaveBypassA() argument
325 RegValue |= QuadSPI_DLLCRA_SLV_DLL_BYPASS(Enable? 1U : 0U); in Qspi_Ip_DLLSlaveBypassA()
335 boolean Enable in Qspi_Ip_DLLSlaveAutoUpdateA() argument
341 RegValue |= QuadSPI_DLLCRA_SLAVE_AUTO_UPDT(Enable? 1U : 0U); in Qspi_Ip_DLLSlaveAutoUpdateA()
[all …]
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| /hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/ |
| D | Clock_Ip_ExtOsc.c | 181 if (Config->Enable != 0U) in Clock_Ip_SetFxoscOsconBypEocvGmSel()
225 if (Config->Enable != 0U) in Clock_Ip_CompleteFxoscOsconBypEocvGmSel()
284 if (1U == Config->Enable) in Clock_Ip_EnableFxoscOsconBypEocvGmSel()
324 if (Config->Enable != 0U) in Clock_Ip_SetSxoscOsconEocv()
355 if (Config->Enable != 0U) in Clock_Ip_CompleteSxoscOsconEocv()
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| D | Clock_Ip_Gate.c | 155 if (Config->Enable != 0U) in Clock_Ip_ClockSetGateMcMePartitionCollectionClockRequest()
236 Config.Enable = 0U; in Clock_Ip_ClockUpdateGateMcMePartitionCollectionClockRequest()
240 Config.Enable = 1U; in Clock_Ip_ClockUpdateGateMcMePartitionCollectionClockRequest()
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| D | Clock_Ip_Pll.c | 193 if (Config->Enable != 0U) in Clock_Ip_SetPllRdivMfiMfnOdiv2SdmenSsscgbypSpreadctlStepnoStepsize()
275 if (1U == Config->Enable) in Clock_Ip_EnablePllRdivMfiMfnOdiv2SdmenSsscgbypSpreadctlStepnoStepsize()
332 if (Config->Enable != 0U) in Clock_Ip_SetPllRdivMfiMfnOdiv2Sdmen()
394 if (1U == Config->Enable) in Clock_Ip_EnablePllRdivMfiMfnOdiv2Sdmen()
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| D | Clock_Ip_Specific.c | 508 FircConfig.Enable = TRUE; in EnableFircInStandbyMode()
509 Clock_Ip_pxFircStdbyClock->Enable(&FircConfig); in EnableFircInStandbyMode()
522 SircConfig.Enable = TRUE; in EnableSircInStandbyMode()
523 Clock_Ip_pxSircStdbyClock->Enable(&SircConfig); in EnableSircInStandbyMode()
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| D | Clock_Ip_IntOsc.c | 147 if (Config->Enable != 0U) in Clock_Ip_SetFircStdby()
177 if (Config->Enable != 0U) in Clock_Ip_SetSircStdby()
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| D | Clock_Ip_Monitor.c | 338 …if (HashCmu[Index] != ((((uint32)Config->Enable) ^ ((uint32)Config->Interrupt) ^ ((uint32)Config->… in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()
340 …HashCmu[Index] = ((((uint32)Config->Enable) ^ ((uint32)Config->Interrupt) ^ ((uint32)Config->Monit… in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()
423 if (Config->Enable != 0U) in Clock_Ip_EnableCmuFcFceRefCntLfrefHfref()
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| D | Clock_Ip.c | 821 Clock_Ip_axPllCallbacks[CallbackIndex].Enable(&(*Config->Plls)[Index]); in Clock_Ip_InitClock()
884 Clock_Ip_axCmuCallbacks[CallbackIndex].Enable(&(*Config->Cmus)[Index]); in Clock_Ip_InitClock()
996 Clock_Ip_axCmuCallbacks[CallbackIndex].Enable(&(*Clock_Ip_pxConfig->Cmus)[Index]); in Clock_Ip_DistributePll()
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| /hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/ |
| D | Clock_Ip_Gate.c | 144 if (Config->Enable != 0U) in Clock_Ip_ClockSetGateClockControlEnableGprPctl()
160 Config.Enable = 0U; in Clock_Ip_ClockUpdateGateClockControlEnableGprPctl()
164 Config.Enable = 1U; in Clock_Ip_ClockUpdateGateClockControlEnableGprPctl()
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| D | Clock_Ip_Pll.c | 187 if (Config->Enable != 0U) in Clock_Ip_SetPlldigRdivMfiMfnSdmenSsscgbypSpreadctlStepnoStepsize()
262 if (1U == Config->Enable) in Clock_Ip_EnablePlldigRdivMfiMfnSdmenSsscgbypSpreadctlStepnoStepsize()
297 if (Config->Enable != 0U) in Clock_Ip_SetPlldigRdivMfiMfnSdmen()
364 if (1U == Config->Enable) in Clock_Ip_EnablePlldigRdivMfiMfnSdmen()
401 if (1U == Config->Enable) in Clock_Ip_SetLfastPLL()
468 if (1U == Config->Enable) in Clock_Ip_EnableLfastPLL()
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| D | Clock_Ip_ExtOsc.c | 161 if (Config->Enable != 0U) in Clock_Ip_SetFxoscOsconBypEocvGmSel()
187 if (Config->Enable != 0U) in Clock_Ip_CompleteFxoscOsconBypEocvGmSel()
232 if (1U == Config->Enable) in Clock_Ip_EnableFxoscOsconBypEocvGmSel()
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| D | Clock_Ip_Monitor.c | 335 …if (HashCmu[Index] != ((((uint32)Config->Enable) ^ ((uint32)Config->Interrupt) ^ ((uint32)Config->… in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()
337 …HashCmu[Index] = ((((uint32)Config->Enable) ^ ((uint32)Config->Interrupt) ^ ((uint32)Config->Monit… in Clock_Ip_SetCmuFcFceRefCntLfrefHfref()
450 if (Config->Enable != 0U) in Clock_Ip_EnableCmuFcFceRefCntLfrefHfref()
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| D | Clock_Ip_FracDiv.c | 156 if (0U != Config->Enable) in Clock_Ip_SetDfsMfiMfn()
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| /hal_nxp-3.5.0/s32/drivers/s32ze/EthSwt_NETC/include/ |
| D | Netc_EthSwt_Ip.h | 438 …e Netc_EthSwt_Ip_EnableVlan( uint8 SwitchIdx, uint8 SwitchPortIdx, uint16 VlanId, boolean Enable );
926 … Netc_EthSwt_Ip_EnableIngressPortFiltering( uint8 SwitchIdx, uint8 SwitchPortIdx, boolean Enable );
1015 …Shaper(uint8 SwitchIdx, const uint8 SwitchPortIdx, const uint8 TrafficClass, const boolean Enable);
1046 boolean Enable
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| /hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/include/ |
| D | Clock_Ip_Private.h | 293 intOscEnableCallback Enable; member
309 extOscEnableCallback Enable; member
352 pllEnableCallback Enable; member
384 clockMonitorEnableCallback Enable; member
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| D | Clock_Ip_Types.h | 2921 uint16 Enable; /**< Enable ircosc. */ member
2940 uint16 Enable; /**< Enable xosc. */ member
2961 uint16 Enable; /**< Enable pll. */ member
3033 uint8 Enable; /**< Enable control for port n */ member
3070 uint16 Enable; /**< Enable or disable clock */ member
3081 …uint8 Enable; /**< Enable/disable clock monitor … member
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| /hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/include/ |
| D | Clock_Ip_Private.h | 293 intOscEnableCallback Enable; member
309 extOscEnableCallback Enable; member
352 pllEnableCallback Enable; member
388 clockMonitorEnableCallback Enable; member
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| D | Clock_Ip_Types.h | 2771 uint16 Enable; /**< Enable ircosc. */ member
2790 uint16 Enable; /**< Enable xosc. */ member
2811 uint16 Enable; /**< Enable pll. */ member
2883 uint8 Enable; /**< Enable control for port n */ member
2920 uint16 Enable; /**< Enable or disable clock */ member
2931 …uint8 Enable; /**< Enable/disable clock monitor … member
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| /hal_nxp-3.5.0/s32/drivers/s32k3/Pwm/include/ |
| D | Emios_Pwm_Ip.h | 150 boolean Enable);
163 boolean Enable);
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| /hal_nxp-3.5.0/s32/drivers/s32k3/Eth_GMAC/src/ |
| D | Gmac_Ip.c | 2354 boolean Enable) in Gmac_Ip_SetBroadcastForwardAll() argument
2362 if (Enable) in Gmac_Ip_SetBroadcastForwardAll()
2384 boolean Enable) in Gmac_Ip_SetMulticastForwardAll() argument
2392 if (Enable) in Gmac_Ip_SetMulticastForwardAll()
2416 boolean Enable) in Gmac_Ip_SetUnicastHashFilter() argument
2424 if (Enable) in Gmac_Ip_SetUnicastHashFilter()
2445 boolean Enable) in Gmac_Ip_SetMulticastHashFilter() argument
2453 if (Enable) in Gmac_Ip_SetMulticastHashFilter()
2474 boolean Enable) in Gmac_Ip_SetHashOrPerfectFilter() argument
2482 if (Enable) in Gmac_Ip_SetHashOrPerfectFilter()
[all …]
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| /hal_nxp-3.5.0/mcux/middleware/mcux-sdk-middleware-usb/ |
| D | ChangeLogKSDK.txt | 13 - Enable ROOT2 macro in USB device stack.
43 - Enable USB host audio recorder demo for mutilple boards.
51 - Enable USB host video demo for mutilple boards.
52 - Enable USB device MTP demo for mutilple boards.
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| /hal_nxp-3.5.0/s32/drivers/s32k3/Adc/include/ |
| D | Adc_Sar_Ip_HwAccess.h | 172 boolean Enable) in Adc_Sar_EnableHighSpeed() argument
176 Amsio |= ADC_AMSIO_HSEN(Enable ? 3u : 0u); in Adc_Sar_EnableHighSpeed()
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