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Searched refs:Config (Results 1 – 25 of 64) sorted by relevance

123

/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip.c178 static void Clock_Ip_ResetClockConfiguration(Clock_Ip_ClockConfigType const * Config);
179 static void Clock_Ip_UpdateDriverContext(Clock_Ip_ClockConfigType const * Config);
187 static void Clock_Ip_CheckClockConfiguration(Clock_Ip_ClockConfigType const * Config);
188 static void Clock_Ip_CheckIrcoscClocks(Clock_Ip_ClockConfigType const * Config);
189 static void Clock_Ip_CheckXoscClocks(Clock_Ip_ClockConfigType const * Config);
190 static void Clock_Ip_CheckPllClocks(Clock_Ip_ClockConfigType const * Config);
191 static void Clock_Ip_CheckExtSigClocks(Clock_Ip_ClockConfigType const * Config);
192 static void Clock_Ip_CheckSelectorClocks(Clock_Ip_ClockConfigType const * Config);
193 static void Clock_Ip_CheckDividerClocks(Clock_Ip_ClockConfigType const * Config);
194 static void Clock_Ip_CheckDividerTriggerClocks(Clock_Ip_ClockConfigType const * Config);
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DClock_Ip_ExtOsc.c105 static void Clock_Ip_ExternalOscillatorEmpty(Clock_Ip_XoscConfigType const* Config);
109 static void Clock_Ip_ResetFxoscOsconBypEocvGmSel(Clock_Ip_XoscConfigType const* Config);
110 static void Clock_Ip_SetFxoscOsconBypEocvGmSel(Clock_Ip_XoscConfigType const* Config);
111 static void Clock_Ip_CompleteFxoscOsconBypEocvGmSel(Clock_Ip_XoscConfigType const* Config);
113 static void Clock_Ip_EnableFxoscOsconBypEocvGmSel(Clock_Ip_XoscConfigType const* Config);
115 static void Clock_Ip_ExternalOscillatorEmpty(Clock_Ip_XoscConfigType const* Config);
117 static void Clock_Ip_ResetSxoscOsconEocv(Clock_Ip_XoscConfigType const* Config);
118 static void Clock_Ip_SetSxoscOsconEocv(Clock_Ip_XoscConfigType const* Config);
119 static void Clock_Ip_CompleteSxoscOsconEocv(Clock_Ip_XoscConfigType const* Config);
121 static void Clock_Ip_EnableSxoscOsconEocv(Clock_Ip_XoscConfigType const* Config);
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DClock_Ip_Selector.c99 void Clock_Ip_SetRtcRtccClksel_TrustedCall(Clock_Ip_SelectorConfigType const *Config);
106 static void Clock_Ip_CallbackSelectorEmpty(Clock_Ip_SelectorConfigType const* Config);
109 static void Clock_Ip_ResetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config);
110 static void Clock_Ip_SetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config);
114 …ic void Clock_Ip_ResetCgmXCscCssClkswRampupRampdownSwip(Clock_Ip_SelectorConfigType const *Config);
115 static void Clock_Ip_SetCgmXCscCssClkswRampupRampdownSwip(Clock_Ip_SelectorConfigType const *Config…
119 static void Clock_Ip_SetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config);
120 static void Clock_Ip_ResetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config);
124 static void Clock_Ip_SetRtcRtccClksel(Clock_Ip_SelectorConfigType const *Config);
139 static void Clock_Ip_CallbackSelectorEmpty(Clock_Ip_SelectorConfigType const* Config) in Clock_Ip_CallbackSelectorEmpty() argument
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DClock_Ip_Pll.c103 static void Clock_Ip_CallbackPllEmpty(Clock_Ip_PllConfigType const* Config);
108 …_ResetPllRdivMfiMfnOdiv2SdmenSsscgbypSpreadctlStepnoStepsize(Clock_Ip_PllConfigType const* Config);
109 …Ip_SetPllRdivMfiMfnOdiv2SdmenSsscgbypSpreadctlStepnoStepsize(Clock_Ip_PllConfigType const* Config);
111 …EnablePllRdivMfiMfnOdiv2SdmenSsscgbypSpreadctlStepnoStepsize(Clock_Ip_PllConfigType const* Config);
115 static void Clock_Ip_ResetPllRdivMfiMfnOdiv2Sdmen(Clock_Ip_PllConfigType const* Config);
116 static void Clock_Ip_SetPllRdivMfiMfnOdiv2Sdmen(Clock_Ip_PllConfigType const* Config);
118 static void Clock_Ip_EnablePllRdivMfiMfnOdiv2Sdmen(Clock_Ip_PllConfigType const* Config);
137 static void Clock_Ip_CallbackPllEmpty(Clock_Ip_PllConfigType const* Config) in Clock_Ip_CallbackPllEmpty() argument
139 (void)Config; in Clock_Ip_CallbackPllEmpty()
161 …p_ResetPllRdivMfiMfnOdiv2SdmenSsscgbypSpreadctlStepnoStepsize(Clock_Ip_PllConfigType const* Config) in Clock_Ip_ResetPllRdivMfiMfnOdiv2SdmenSsscgbypSpreadctlStepnoStepsize() argument
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DClock_Ip_Divider.c103 static void Clock_Ip_Callback_DividerEmpty(Clock_Ip_DividerConfigType const* Config);
105 static void Clock_Ip_SetCgmXDeDivStatWithoutPhase(Clock_Ip_DividerConfigType const* Config);
108 static void Clock_Ip_SetPllPll0divDeDivOutput(Clock_Ip_DividerConfigType const* Config);
112 static void Clock_Ip_SetPllPlldvOdiv2Output(Clock_Ip_DividerConfigType const* Config);
129 static void Clock_Ip_Callback_DividerEmpty(Clock_Ip_DividerConfigType const* Config) in Clock_Ip_Callback_DividerEmpty() argument
131 (void)Config; in Clock_Ip_Callback_DividerEmpty()
136 static void Clock_Ip_SetCgmXDeDivStatWithoutPhase(Clock_Ip_DividerConfigType const* Config) in Clock_Ip_SetCgmXDeDivStatWithoutPhase() argument
152 if (NULL_PTR != Config) in Clock_Ip_SetCgmXDeDivStatWithoutPhase()
154 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_SetCgmXDeDivStatWithoutPhase()
155 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_SetCgmXDeDivStatWithoutPhase()
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DClock_Ip_IntOsc.c102 static void Clock_Ip_InternalOscillatorEmpty(Clock_Ip_IrcoscConfigType const* Config);
105 static void Clock_Ip_SetFircStdby(Clock_Ip_IrcoscConfigType const* Config);
106 static void Clock_Ip_EnableFircStdby(Clock_Ip_IrcoscConfigType const* Config);
110 static void Clock_Ip_SetSircStdby(Clock_Ip_IrcoscConfigType const* Config);
111 static void Clock_Ip_EnableSircStdby(Clock_Ip_IrcoscConfigType const* Config);
115 static void Clock_Ip_SetFircDivSelHSEb(Clock_Ip_IrcoscConfigType const* Config);
130 static void Clock_Ip_InternalOscillatorEmpty(Clock_Ip_IrcoscConfigType const* Config) in Clock_Ip_InternalOscillatorEmpty() argument
132 (void)Config; in Clock_Ip_InternalOscillatorEmpty()
143 static void Clock_Ip_SetFircStdby(Clock_Ip_IrcoscConfigType const* Config) in Clock_Ip_SetFircStdby() argument
145 if (NULL_PTR != Config) in Clock_Ip_SetFircStdby()
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DClock_Ip_ProgFreqSwitch.c133 static void Clock_Ip_ProgressiveFrequencyClockSwitchEmpty( Clock_Ip_PcfsConfigType const* Config,
137 static void Clock_Ip_CgmXPcfsSdurDivcDiveDivs( Clock_Ip_PcfsConfigType const *Config,
156 static void Clock_Ip_ProgressiveFrequencyClockSwitchEmpty( Clock_Ip_PcfsConfigType const* Config, in Clock_Ip_ProgressiveFrequencyClockSwitchEmpty() argument
160 (void)Config; in Clock_Ip_ProgressiveFrequencyClockSwitchEmpty()
166 static void Clock_Ip_CgmXPcfsSdurDivcDiveDivs( Clock_Ip_PcfsConfigType const *Config, in Clock_Ip_CgmXPcfsSdurDivcDiveDivs() argument
189 if (NULL_PTR != Config) in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
191 …CgmPcfsBase = Clock_Ip_apxCgmPcfs[Clock_Ip_au8ClockFeatures[Config->SelectorName][CLOCK_IP_MODULE… in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
192 HwIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_PCFS_INDEX]; in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
195 CLOCK_IP_DEV_ASSERT(Config->SelectorName != RESERVED_CLK); in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
198 …2)Config->ClockSourceFrequency) ^ ((uint32)Config->MaxAllowableIDDchange) ^ ((uint32)Config->Name)… in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
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DClock_Ip_Monitor.c151 static void Clock_Ip_ClockMonitorEmpty(Clock_Ip_CmuConfigType const* Config);
152 static void Clock_Ip_ClockMonitorEmpty_Set( Clock_Ip_CmuConfigType const* Config,
158 static void Clock_Ip_ResetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config);
160 static void Clock_Ip_SetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config, uint32 Index…
163 static void Clock_Ip_EnableCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config);
168 static void Clock_Ip_SetClockMonitorRegisterValues(Clock_Ip_CmuConfigType const* Config, uint32 Ind…
188 static void Clock_Ip_ClockMonitorEmpty(Clock_Ip_CmuConfigType const* Config) in Clock_Ip_ClockMonitorEmpty() argument
190 (void)Config; in Clock_Ip_ClockMonitorEmpty()
194 static void Clock_Ip_ClockMonitorEmpty_Set( Clock_Ip_CmuConfigType const* Config, in Clock_Ip_ClockMonitorEmpty_Set() argument
198 (void)Config; in Clock_Ip_ClockMonitorEmpty_Set()
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DClock_Ip_DividerTrigger.c100 static void Clock_Ip_Callback_DividerTriggerEmpty(Clock_Ip_DividerTriggerConfigType const* Config);
102 … Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat(Clock_Ip_DividerTriggerConfigType const* Config);
103 …ck_Ip_TriggerUpdateCgmXDivTrigCtrlTctlHhenUpdStat(Clock_Ip_DividerTriggerConfigType const* Config);
118 static void Clock_Ip_Callback_DividerTriggerEmpty(Clock_Ip_DividerTriggerConfigType const* Config) in Clock_Ip_Callback_DividerTriggerEmpty() argument
120 (void)Config; in Clock_Ip_Callback_DividerTriggerEmpty()
125 …d Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat(Clock_Ip_DividerTriggerConfigType const* Config) in Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat() argument
130 if (NULL_PTR != Config) in Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat()
132 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat()
133 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat()
136 if (Config->TriggerType != IMMEDIATE_DIVIDER_UPDATE) in Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat()
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DClock_Ip_Gate.c103 static void Clock_Ip_ClockSetGateEmpty(Clock_Ip_GateConfigType const* Config);
106 …id Clock_Ip_ClockSetGateMcMePartitionCollectionClockRequest(Clock_Ip_GateConfigType const* Config);
123 static void Clock_Ip_ClockSetGateEmpty(Clock_Ip_GateConfigType const* Config) in Clock_Ip_ClockSetGateEmpty() argument
125 (void)Config; in Clock_Ip_ClockSetGateEmpty()
136 …oid Clock_Ip_ClockSetGateMcMePartitionCollectionClockRequest(Clock_Ip_GateConfigType const* Config) in Clock_Ip_ClockSetGateMcMePartitionCollectionClockRequest() argument
148 if (NULL_PTR != Config) in Clock_Ip_ClockSetGateMcMePartitionCollectionClockRequest()
150 …GateInformation = &Clock_Ip_axGateInfo[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_GATE_INDEX… in Clock_Ip_ClockSetGateMcMePartitionCollectionClockRequest()
155 if (Config->Enable != 0U) in Clock_Ip_ClockSetGateMcMePartitionCollectionClockRequest()
181 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name); in Clock_Ip_ClockSetGateMcMePartitionCollectionClockRequest()
211 Clock_Ip_ReportClockErrors(CLOCK_IP_REPORT_TIMEOUT_ERROR, Config->Name); in Clock_Ip_ClockSetGateMcMePartitionCollectionClockRequest()
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/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip.c178 static void Clock_Ip_ResetClockConfiguration(Clock_Ip_ClockConfigType const * Config);
179 static void Clock_Ip_UpdateDriverContext(Clock_Ip_ClockConfigType const * Config);
184 static void Clock_Ip_CheckClockConfiguration(Clock_Ip_ClockConfigType const * Config);
185 static void Clock_Ip_CheckIrcoscClocks(Clock_Ip_ClockConfigType const * Config);
186 static void Clock_Ip_CheckXoscClocks(Clock_Ip_ClockConfigType const * Config);
187 static void Clock_Ip_CheckPllClocks(Clock_Ip_ClockConfigType const * Config);
188 static void Clock_Ip_CheckExtSigClocks(Clock_Ip_ClockConfigType const * Config);
189 static void Clock_Ip_CheckSelectorClocks(Clock_Ip_ClockConfigType const * Config);
190 static void Clock_Ip_CheckDividerClocks(Clock_Ip_ClockConfigType const * Config);
191 static void Clock_Ip_CheckDividerTriggerClocks(Clock_Ip_ClockConfigType const * Config);
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DClock_Ip_Selector.c99 void Clock_Ip_ResetMcMeAeGssSysclk_TrustedCall(Clock_Ip_SelectorConfigType const *Config);
100 void Clock_Ip_SetMcMeAeGssSysclk_TrustedCall(Clock_Ip_SelectorConfigType const *Config);
107 static void Clock_Ip_CallbackSelectorEmpty(Clock_Ip_SelectorConfigType const* Config);
110 static void Clock_Ip_ResetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config);
111 static void Clock_Ip_SetCgmXCscCssClkswSwip(Clock_Ip_SelectorConfigType const *Config);
115 static void Clock_Ip_SetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config);
116 static void Clock_Ip_ResetCgmXCscCssCsGrip(Clock_Ip_SelectorConfigType const *Config);
120 static void Clock_Ip_ResetGprXClkoutSelMuxsel(Clock_Ip_SelectorConfigType const *Config);
121 static void Clock_Ip_SetGprXClkoutSelMuxsel(Clock_Ip_SelectorConfigType const *Config);
125 static void Clock_Ip_ResetMcMeAeGssSysclk(Clock_Ip_SelectorConfigType const *Config);
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DClock_Ip_ExtOsc.c105 static void Clock_Ip_ExternalOscillatorEmpty(Clock_Ip_XoscConfigType const* Config);
109 static void Clock_Ip_ResetFxoscOsconBypEocvGmSel(Clock_Ip_XoscConfigType const* Config);
110 static void Clock_Ip_SetFxoscOsconBypEocvGmSel(Clock_Ip_XoscConfigType const* Config);
111 static void Clock_Ip_CompleteFxoscOsconBypEocvGmSel(Clock_Ip_XoscConfigType const* Config);
113 static void Clock_Ip_EnableFxoscOsconBypEocvGmSel(Clock_Ip_XoscConfigType const* Config);
115 static void Clock_Ip_ExternalOscillatorEmpty(Clock_Ip_XoscConfigType const* Config);
133 static void Clock_Ip_ExternalOscillatorEmpty(Clock_Ip_XoscConfigType const* Config) in Clock_Ip_ExternalOscillatorEmpty() argument
135 (void)Config; in Clock_Ip_ExternalOscillatorEmpty()
148 static void Clock_Ip_ResetFxoscOsconBypEocvGmSel(Clock_Ip_XoscConfigType const* Config) in Clock_Ip_ResetFxoscOsconBypEocvGmSel() argument
150 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_ResetFxoscOsconBypEocvGmSel()
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DClock_Ip_Pll.c103 static void Clock_Ip_CallbackPllEmpty(Clock_Ip_PllConfigType const* Config);
108 …Ip_ResetPlldigRdivMfiMfnSdmenSsscgbypSpreadctlStepnoStepsize(Clock_Ip_PllConfigType const* Config);
109 …k_Ip_SetPlldigRdivMfiMfnSdmenSsscgbypSpreadctlStepnoStepsize(Clock_Ip_PllConfigType const* Config);
111 …p_EnablePlldigRdivMfiMfnSdmenSsscgbypSpreadctlStepnoStepsize(Clock_Ip_PllConfigType const* Config);
114 static void Clock_Ip_ResetPlldigRdivMfiMfnSdmen(Clock_Ip_PllConfigType const* Config);
115 static void Clock_Ip_SetPlldigRdivMfiMfnSdmen(Clock_Ip_PllConfigType const* Config);
117 static void Clock_Ip_EnablePlldigRdivMfiMfnSdmen(Clock_Ip_PllConfigType const* Config);
120 static void Clock_Ip_ResetLfastPLL(Clock_Ip_PllConfigType const* Config);
121 static void Clock_Ip_SetLfastPLL(Clock_Ip_PllConfigType const* Config);
123 static void Clock_Ip_EnableLfastPLL(Clock_Ip_PllConfigType const* Config);
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DClock_Ip_Divider.c103 static void Clock_Ip_Callback_DividerEmpty(Clock_Ip_DividerConfigType const* Config);
105 static void Clock_Ip_SetCgmXDeDivStatWithoutPhase(Clock_Ip_DividerConfigType const* Config);
108 …ic void Clock_Ip_SetCgmXDeDivStatWithoutPhaseWithTrigger(Clock_Ip_DividerConfigType const* Config);
111 static void Clock_Ip_SetPlldigPll0divDeDivOutput(Clock_Ip_DividerConfigType const* Config);
127 static void Clock_Ip_Callback_DividerEmpty(Clock_Ip_DividerConfigType const* Config) in Clock_Ip_Callback_DividerEmpty() argument
129 (void)Config; in Clock_Ip_Callback_DividerEmpty()
134 static void Clock_Ip_SetCgmXDeDivStatWithoutPhase(Clock_Ip_DividerConfigType const* Config) in Clock_Ip_SetCgmXDeDivStatWithoutPhase() argument
136 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_SetCgmXDeDivStatWithoutPhase()
137 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_SetCgmXDeDivStatWithoutPhase()
138 uint32 DividerIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_DIVIDER_INDEX]; in Clock_Ip_SetCgmXDeDivStatWithoutPhase()
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DClock_Ip_ProgFreqSwitch.c133 static void Clock_Ip_ProgressiveFrequencyClockSwitchEmpty(Clock_Ip_PcfsConfigType const* Config, ui…
135 static void Clock_Ip_CgmXPcfsSdurDivcDiveDivs(Clock_Ip_PcfsConfigType const *Config, uint32 CfgInde…
152 static void Clock_Ip_ProgressiveFrequencyClockSwitchEmpty(Clock_Ip_PcfsConfigType const* Config, ui… in Clock_Ip_ProgressiveFrequencyClockSwitchEmpty() argument
154 (void)Config; in Clock_Ip_ProgressiveFrequencyClockSwitchEmpty()
160 static void Clock_Ip_CgmXPcfsSdurDivcDiveDivs(Clock_Ip_PcfsConfigType const *Config, uint32 CfgInde… in Clock_Ip_CgmXPcfsSdurDivcDiveDivs() argument
162 …gmPcfsType* CgmPcfsBase = Clock_Ip_apxCgmPcfs[Clock_Ip_au8ClockFeatures[Config->SelectorName][CLO… in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
163 …uint32 HwIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_PCFS_INDEX… in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
182 CLOCK_IP_DEV_ASSERT(Config->SelectorName != RESERVED_CLK); in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
185 …2)Config->ClockSourceFrequency) ^ ((uint32)Config->MaxAllowableIDDchange) ^ ((uint32)Config->Name)… in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
187 …2)Config->ClockSourceFrequency) ^ ((uint32)Config->MaxAllowableIDDchange) ^ ((uint32)Config->Name)… in Clock_Ip_CgmXPcfsSdurDivcDiveDivs()
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DClock_Ip_DividerTrigger.c100 static void Clock_Ip_Callback_DividerTriggerEmpty(Clock_Ip_DividerTriggerConfigType const* Config);
102 … Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat(Clock_Ip_DividerTriggerConfigType const* Config);
103 …ck_Ip_TriggerUpdateCgmXDivTrigCtrlTctlHhenUpdStat(Clock_Ip_DividerTriggerConfigType const* Config);
118 static void Clock_Ip_Callback_DividerTriggerEmpty(Clock_Ip_DividerTriggerConfigType const* Config) in Clock_Ip_Callback_DividerTriggerEmpty() argument
120 (void)Config; in Clock_Ip_Callback_DividerTriggerEmpty()
125 …d Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat(Clock_Ip_DividerTriggerConfigType const* Config) in Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat() argument
127 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat()
128 uint32 SelectorIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_SELECTOR_INDEX]; in Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat()
131 if (Config->TriggerType != IMMEDIATE_DIVIDER_UPDATE) in Clock_Ip_ConfigureCgmXDivTrigCtrlTctlHhenUpdStat()
141 …ock_Ip_TriggerUpdateCgmXDivTrigCtrlTctlHhenUpdStat(Clock_Ip_DividerTriggerConfigType const* Config) in Clock_Ip_TriggerUpdateCgmXDivTrigCtrlTctlHhenUpdStat() argument
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DClock_Ip_Monitor.c149 static void Clock_Ip_ClockMonitorEmpty(Clock_Ip_CmuConfigType const* Config);
150 static void Clock_Ip_ClockMonitorEmpty_Set(Clock_Ip_CmuConfigType const* Config, uint32 Index);
156 static void Clock_Ip_ResetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config);
158 static void Clock_Ip_SetCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config, uint32 Index…
163 static void Clock_Ip_EnableCmuFcFceRefCntLfrefHfref(Clock_Ip_CmuConfigType const* Config);
181 static void Clock_Ip_ClockMonitorEmpty(Clock_Ip_CmuConfigType const* Config) in Clock_Ip_ClockMonitorEmpty() argument
183 (void)Config; in Clock_Ip_ClockMonitorEmpty()
187 static void Clock_Ip_ClockMonitorEmpty_Set(Clock_Ip_CmuConfigType const* Config, uint32 Index) in Clock_Ip_ClockMonitorEmpty_Set() argument
189 (void)Config; in Clock_Ip_ClockMonitorEmpty_Set()
214 static void Clock_Ip_SetClockMonitorRegisterValues(Clock_Ip_CmuConfigType const* Config, uint32 Ind… in Clock_Ip_SetClockMonitorRegisterValues() argument
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DClock_Ip_FracDiv.c101 static void Clock_Ip_CallbackFracDivEmpty(Clock_Ip_FracDivConfigType const* Config);
104 static void Clock_Ip_ResetDfsMfiMfn(Clock_Ip_FracDivConfigType const *Config);
105 static void Clock_Ip_SetDfsMfiMfn(Clock_Ip_FracDivConfigType const *Config);
121 static void Clock_Ip_CallbackFracDivEmpty(Clock_Ip_FracDivConfigType const* Config) in Clock_Ip_CallbackFracDivEmpty() argument
123 (void)Config; in Clock_Ip_CallbackFracDivEmpty()
135 static void Clock_Ip_ResetDfsMfiMfn(Clock_Ip_FracDivConfigType const *Config) in Clock_Ip_ResetDfsMfiMfn() argument
138 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_ResetDfsMfiMfn()
139 uint32 DividerIndex = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_DIVIDER_INDEX]; in Clock_Ip_ResetDfsMfiMfn()
144 static void Clock_Ip_SetDfsMfiMfn(Clock_Ip_FracDivConfigType const *Config) in Clock_Ip_SetDfsMfiMfn() argument
147 uint32 Instance = Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_MODULE_INSTANCE]; in Clock_Ip_SetDfsMfiMfn()
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DClock_Ip_Gate.c103 static void Clock_Ip_ClockSetGateEmpty(Clock_Ip_GateConfigType const* Config);
106 static void Clock_Ip_ClockSetGateClockControlEnableGprPctl(Clock_Ip_GateConfigType const* Config);
123 static void Clock_Ip_ClockSetGateEmpty(Clock_Ip_GateConfigType const* Config) in Clock_Ip_ClockSetGateEmpty() argument
125 (void)Config; in Clock_Ip_ClockSetGateEmpty()
137 static void Clock_Ip_ClockSetGateClockControlEnableGprPctl(Clock_Ip_GateConfigType const* Config) in Clock_Ip_ClockSetGateClockControlEnableGprPctl() argument
139 …oType * GateInformation = &Clock_Ip_axGateInfo[Clock_Ip_au8ClockFeatures[Config->Name][CLOCK_IP_GA… in Clock_Ip_ClockSetGateClockControlEnableGprPctl()
144 if (Config->Enable != 0U) in Clock_Ip_ClockSetGateClockControlEnableGprPctl()
155 Clock_Ip_GateConfigType Config; in Clock_Ip_ClockUpdateGateClockControlEnableGprPctl() local
157 Config.Name = ClockName; in Clock_Ip_ClockUpdateGateClockControlEnableGprPctl()
160 Config.Enable = 0U; in Clock_Ip_ClockUpdateGateClockControlEnableGprPctl()
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/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/include/
DClock_Ip_Private.h287 typedef void (*intOscSetCallback)(Clock_Ip_IrcoscConfigType const * Config);
289 typedef void (*intOscEnableCallback)(Clock_Ip_IrcoscConfigType const * Config);
298 typedef void (*extOscSetCallback)(Clock_Ip_XoscConfigType const * Config);
299 typedef void (*extOscResetCallback)(Clock_Ip_XoscConfigType const * Config);
301 typedef void (*extOscEnableCallback)(Clock_Ip_XoscConfigType const * Config);
314 typedef void (*dividerSetCallback)(Clock_Ip_DividerConfigType const * Config);
321 typedef void (*dividerConfigureCallback)(Clock_Ip_DividerTriggerConfigType const * Config);
322 typedef void (*dividerTriggerUpdateCallback)(Clock_Ip_DividerTriggerConfigType const * Config);
331 typedef void (*fracDivSetCallback)(Clock_Ip_FracDivConfigType const * Config);
332 typedef void (*fracDivResetCallback)(Clock_Ip_FracDivConfigType const * Config);
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/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/include/
DClock_Ip_Private.h287 typedef void (*intOscSetCallback)(Clock_Ip_IrcoscConfigType const * Config);
289 typedef void (*intOscEnableCallback)(Clock_Ip_IrcoscConfigType const * Config);
298 typedef void (*extOscSetCallback)(Clock_Ip_XoscConfigType const * Config);
299 typedef void (*extOscResetCallback)(Clock_Ip_XoscConfigType const * Config);
301 typedef void (*extOscEnableCallback)(Clock_Ip_XoscConfigType const * Config);
314 typedef void (*dividerSetCallback)(Clock_Ip_DividerConfigType const * Config);
321 typedef void (*dividerConfigureCallback)(Clock_Ip_DividerTriggerConfigType const * Config);
322 typedef void (*dividerTriggerUpdateCallback)(Clock_Ip_DividerTriggerConfigType const * Config);
331 typedef void (*fracDivSetCallback)(Clock_Ip_FracDivConfigType const * Config);
332 typedef void (*fracDivResetCallback)(Clock_Ip_FracDivConfigType const * Config);
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/hal_nxp-3.5.0/s32/drivers/s32k3/Eth_GMAC/src/
DGmac_Ip.c271 const Gmac_CtrlConfigType *Config);
273 const Gmac_CtrlConfigType *Config);
275 const Gmac_Ip_ConfigType *Config,
279 const Gmac_Ip_ConfigType *Config,
285 const Gmac_Ip_ConfigType *Config);
295 static void Gmac_Ip_InitMTL(uint8 Instance, const Gmac_CtrlConfigType *Config);
298 const Gmac_CtrlConfigType *Config);
417 const Gmac_CtrlConfigType *Config) in Gmac_Ip_InitDMA() argument
466 …Base->DMA_SYSBUS_MODE = GMAC_DMA_SYSBUS_MODE_RD_OSR_LMT(((uint32)Config->Gmac_pCtrlConfig->TxRingC… in Gmac_Ip_InitDMA()
474 Gmac_Ip_InitTxBD(Instance, Config->Gmac_pCtrlConfig, Config->Gmac_paCtrlTxRingConfig); in Gmac_Ip_InitDMA()
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/hal_nxp-3.5.0/s32/drivers/s32ze/Can_CANEXCEL/src/
DCanEXCEL_Ip.c182 Canexcel_Ip_StatusType Canexcel_Ip_Init(uint8 instance, const Canexcel_Ip_ConfigType * Config, Cane… in Canexcel_Ip_Init() argument
226 CANEXCEL.EXL_GRP[instance]->DSCCTRL = CANXL_GRP_CONTROL_DSCCTRL_TXDSC(Config->tx_mbdesc-1u); in Canexcel_Ip_Init()
227 …[instance]->SYSMCFG |= (CANXL_SIC_SYSMCFG_MAXTXMB(Config->tx_mbdesc) | CANXL_SIC_SYSMCFG_MAXRXMB(C… in Canexcel_Ip_Init()
228 CanXL_SetFDEnabled(CANEXCEL.EXL_SIC[instance], Config->fd_enable, Config->bitRateSwitch); in Canexcel_Ip_Init()
229 CanXL_SetXLEnable(CANEXCEL.EXL_SIC[instance], Config->xl_enable); in Canexcel_Ip_Init()
230 CanXL_InitBaudrate(CANEXCEL.EXL_SIC[instance], Config); in Canexcel_Ip_Init()
231 CanXL_SetOperationMode(CANEXCEL.EXL_SIC[instance], Config->CanxlMode); in Canexcel_Ip_Init()
232 returnResult = CanXL_ConfigCtrlOptions(CANEXCEL.EXL_SIC[instance], Config->ctrlOptions); in Canexcel_Ip_Init()
233 for(timeElapsed = 0U; timeElapsed<Config->tx_mbdesc; timeElapsed++ ) in Canexcel_Ip_Init()
238 for(; timeElapsed<(Config->rx_mbdesc + Config->tx_mbdesc); timeElapsed++ ) in Canexcel_Ip_Init()
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/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MKE14F16/drivers/
Dfsl_clock.h785 } Config; in CLOCK_SetVlprModeSysClkConfig() local
787 Config.configPtr = config; in CLOCK_SetVlprModeSysClkConfig()
788 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
805 } Config; in CLOCK_SetRunModeSysClkConfig() local
807 Config.configPtr = config; in CLOCK_SetRunModeSysClkConfig()
808 SCG->RCCR = *(Config.configInt); in CLOCK_SetRunModeSysClkConfig()
825 } Config; in CLOCK_SetHsrunModeSysClkConfig() local
827 Config.configPtr = config; in CLOCK_SetHsrunModeSysClkConfig()
828 SCG->HCCR = *(Config.configInt); in CLOCK_SetHsrunModeSysClkConfig()
845 } Config; in CLOCK_GetCurSysClkConfig() local
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