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Searched refs:outpw (Results 1 – 11 of 11) sorted by relevance

/hal_nuvoton-latest/m48x/StdDriver/src/
Dcrypto.c185 outpw(key_reg_addr, au32Keys[i]); in AES_SetKey()
205 outpw(key_reg_addr, au32IV[i]); in AES_SetInitVect()
225 outpw(reg_addr, u32SrcAddr); in AES_SetDMATransfer()
228 outpw(reg_addr, u32DstAddr); in AES_SetDMATransfer()
231 outpw(reg_addr, u32TransCnt); in AES_SetDMATransfer()
305 outpw(reg_addr, au32Keys[i][0]); /* TDESn_KEYxH */ in TDES_SetKey()
307 outpw(reg_addr, au32Keys[i][1]); /* TDESn_KEYxL */ in TDES_SetKey()
325 outpw(reg_addr, u32IVH); in TDES_SetInitVect()
328 outpw(reg_addr, u32IVL); in TDES_SetInitVect()
346 outpw(reg_addr, u32SrcAddr); in TDES_SetDMATransfer()
[all …]
Dclk.c1179 outpw((uint32_t *)u32tmpAddr, u32tmpVal); in CLK_EnableSPDWKPin()
/hal_nuvoton-latest/m2l31x/StdDriver/src/
Dcrypto.c194 outpw(key_reg_addr, au32Keys[i]); in AES_SetKey()
216 outpw(key_reg_addr, au32IV[i]); in AES_SetInitVect()
Deadc.c37 outpw(EADC0_BASE+0xFF4, inpw(EADC0_BASE+0xFF4) | BIT1); in EADC_Open()
Dclk.c1337 outpw((uint32_t *)u32tmpAddr, u32tmpVal); in CLK_EnableSPDWKPin()
/hal_nuvoton-latest/m46x/Devices/M460/Source/
Dsystem_M460.c85 outpw(0x40000014, inpw(0x40000014)|BIT7); in SystemInit()
/hal_nuvoton-latest/m48x/Devices/M480/Include/
DM480.h501 #define outpw(port,value) *((volatile unsigned int *)(port)) = (value) macro
/hal_nuvoton-latest/m2l31x/Devices/M2L31/Include/
DM2L31.h616 #define outpw(port,value) (*((volatile unsigned int *)(port))=(value)) macro
/hal_nuvoton-latest/m46x/Devices/M460/Include/
Dm460.h599 #define outpw(port,value) *((volatile unsigned int *)(port)) = (value) macro
/hal_nuvoton-latest/m46x/StdDriver/src/
Dclk.c1392 outpw((uint32_t *)u32tmpAddr, u32tmpVal); in CLK_EnableSPDWKPin()
Dcrypto.c218 outpw(key_reg_addr, au32Keys[i]); in AES_SetKey()
262 outpw(key_reg_addr, au32IV[i]); in AES_SetInitVect()