1 /**************************************************************************//**
2 * @file system_m460.c
3 * @version V3.000
4 * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Source File for M460
5 *
6 * @copyright SPDX-License-Identifier: Apache-2.0
7 * @copyright Copyright (C) 2021 Nuvoton Technology Corp. All rights reserved.
8 *****************************************************************************/
9
10 #include "NuMicro.h"
11
12
13 /*----------------------------------------------------------------------------
14 DEFINES
15 *----------------------------------------------------------------------------*/
16
17 /*----------------------------------------------------------------------------
18 Clock Variable definitions
19 *----------------------------------------------------------------------------*/
20 uint32_t SystemCoreClock = __SYSTEM_CLOCK; /*!< System Clock Frequency (Core Clock)*/
21 uint32_t CyclesPerUs = (__HSI / 1000000UL); /* Cycles per micro second */
22 uint32_t PllClock = __HSI; /*!< PLL Output Clock Frequency */
23 uint32_t gau32ClkSrcTbl[] = {__HXT, __LXT, 0UL, __LIRC, 0UL, 0UL, 0UL, __HIRC};
24
25 /*----------------------------------------------------------------------------
26 Clock functions
27 *----------------------------------------------------------------------------*/
SystemCoreClockUpdate(void)28 void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
29 {
30 uint32_t u32Freq, u32ClkSrc;
31 uint32_t u32HclkDiv;
32
33 /* Update PLL Clock */
34 PllClock = CLK_GetPLLClockFreq();
35
36 u32ClkSrc = CLK->CLKSEL0 & CLK_CLKSEL0_HCLKSEL_Msk;
37
38 if(u32ClkSrc == CLK_CLKSEL0_HCLKSEL_PLL)
39 {
40 /* Use PLL clock */
41 u32Freq = PllClock;
42 }
43 else
44 {
45 /* Use the clock sources directly */
46 u32Freq = gau32ClkSrcTbl[u32ClkSrc];
47 }
48
49 u32HclkDiv = (CLK->CLKDIV0 & CLK_CLKDIV0_HCLKDIV_Msk) + 1UL;
50
51 /* Update System Core Clock */
52 SystemCoreClock = u32Freq / u32HclkDiv;
53
54
55 //if(SystemCoreClock == 0)
56 // __BKPT(0);
57
58 CyclesPerUs = (SystemCoreClock + 500000UL) / 1000000UL;
59 }
60
61
62 /**
63 * @brief Initialize the System
64 *
65 * @param none
66 * @return none
67 */
SystemInit(void)68 void SystemInit (void)
69 {
70
71 /* Add your system initialize code here.
72 Do not use global variables because this function is called before
73 reaching pre-main. RW section maybe overwritten afterwards. */
74
75 /* FPU settings ------------------------------------------------------------*/
76 #if (__FPU_PRESENT == 1U) && (__FPU_USED == 1U)
77 SCB->CPACR |= ((3UL << 10*2) | /* set CP10 Full Access */
78 (3UL << 11*2) ); /* set CP11 Full Access */
79 #endif
80
81 /* Unlock protected registers */
82 SYS_UnlockReg();
83
84 /* Set HCLK switch to be reset by HRESET reset sources */
85 outpw(0x40000014, inpw(0x40000014)|BIT7);
86
87 /* Set HXT crystal as INV type */
88 CLK->PWRCTL &= ~CLK_PWRCTL_HXTSELTYP_Msk;
89
90 #ifdef HBI_ENABLE
91 /* Default to Enable HyperRAM */
92 CLK->AHBCLK0 |= CLK_AHBCLK0_HBICKEN_Msk;
93
94 /* Set multi-function pins for HBI */
95 #if HBI_ENABLE == 1
96
97 SET_HBI_D0_PG11();
98 SET_HBI_D1_PG12();
99 SET_HBI_D2_PC0();
100 SET_HBI_D3_PG10();
101 SET_HBI_D4_PG9();
102 SET_HBI_D5_PG13();
103 SET_HBI_D6_PG14();
104 SET_HBI_D7_PG15();
105
106 SET_HBI_RWDS_PC1();
107 SET_HBI_nRESET_PC2();
108 SET_HBI_nCS_PC3();
109 SET_HBI_CK_PC4();
110 SET_HBI_nCK_PC5();
111
112 /* Slew rate control. PC0-5, PG9-15 */
113 CLK->AHBCLK0 |= CLK_AHBCLK0_GPCCKEN_Msk | CLK_AHBCLK0_GPGCKEN_Msk;
114
115 PC->SLEWCTL = 0xaaa;
116 PG->SLEWCTL = 0xaaa80000;
117
118 #elif HBI_ENABLE == 2
119
120 SET_HBI_D0_PJ6();
121 SET_HBI_D1_PJ5();
122 SET_HBI_D2_PJ4();
123 SET_HBI_D3_PJ3();
124 SET_HBI_D4_PH15();
125 SET_HBI_D5_PD7();
126 SET_HBI_D6_PD6();
127 SET_HBI_D7_PD5();
128
129 SET_HBI_RWDS_PH14();
130 SET_HBI_nRESET_PJ2();
131 SET_HBI_nCS_PJ7();
132 SET_HBI_CK_PH13();
133 SET_HBI_nCK_PH12();
134
135 /* Slew rate control. PD5-7, PJ2-7, PH12-15 */
136 CLK->AHBCLK0 |= CLK_AHBCLK0_GPDCKEN_Msk | CLK_AHBCLK0_GPHCKEN_Msk;
137 CLK->AHBCLK1 |= CLK_AHBCLK1_GPJCKEN_Msk;
138
139 PD->SLEWCTL = 0xa800;
140 PJ->SLEWCTL = 0xaaa0;
141 PH->SLEWCTL = 0xaa000000;
142
143 #else
144 # error "HBI_ENABLE must be 1 or 2 to set relative MFP"
145 #endif
146 #endif
147
148
149
150 /* Lock protected registers */
151 SYS_LockReg();
152
153 }
154
