1 /**************************************************************************//**
2 * @file eadc.c
3 * @version V1.0
4 * @brief M2L31 series EADC driver source file
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 * @copyright (C) 2023 Nuvoton Technology Corp. All rights reserved.
8 *****************************************************************************/
9 #include "NuMicro.h"
10
11 /** @addtogroup Standard_Driver Standard Driver
12 @{
13 */
14
15 /** @addtogroup EADC_Driver EADC Driver
16 @{
17 */
18
19 /** @addtogroup EADC_EXPORTED_FUNCTIONS EADC Exported Functions
20 @{
21 */
22
23 /**
24 * @brief This function make EADC_module be ready to convert.
25 * @param[in] eadc The pointer of the specified EADC module.
26 * @param[in] u32InputMode Decides the input mode.
27 * - \ref EADC_CTL_DIFFEN_SINGLE_END :Single end input mode.
28 * - \ref EADC_CTL_DIFFEN_DIFFERENTIAL :Differential input type.
29 * @return None
30 * @details This function is used to set analog input mode and enable A/D Converter.
31 * Before starting A/D conversion function, ADCEN bit should be set to 1.
32 * @note
33 */
EADC_Open(EADC_T * eadc,uint32_t u32InputMode)34 void EADC_Open(EADC_T *eadc, uint32_t u32InputMode)
35 {
36 /* Enable EADC Boost mode */
37 outpw(EADC0_BASE+0xFF4, inpw(EADC0_BASE+0xFF4) | BIT1);
38
39 eadc->CTL &= (~EADC_CTL_DIFFEN_Msk);
40
41 eadc->CTL |= (u32InputMode | EADC_CTL_ADCEN_Msk);
42 }
43
44 /**
45 * @brief Disable EADC_module.
46 * @param[in] eadc The pointer of the specified EADC module..
47 * @return None
48 * @details Clear ADCEN bit to disable A/D converter analog circuit power consumption.
49 */
EADC_Close(EADC_T * eadc)50 void EADC_Close(EADC_T *eadc)
51 {
52 eadc->CTL &= ~EADC_CTL_ADCEN_Msk;
53 }
54
55 /**
56 * @brief Configure the sample control logic module.
57 * @param[in] eadc The pointer of the specified EADC module.
58 * @param[in] u32ModuleNum Decides the sample module number, valid value are from 0 to 30.
59 * @param[in] u32TriggerSrc Decides the trigger source. Valid values are:
60 * - \ref EADC_SOFTWARE_TRIGGER
61 * - \ref EADC_FALLING_EDGE_TRIGGER
62 * - \ref EADC_RISING_EDGE_TRIGGER
63 * - \ref EADC_FALLING_RISING_EDGE_TRIGGER
64 * - \ref EADC_ADINT0_TRIGGER
65 * - \ref EADC_ADINT1_TRIGGER
66 * - \ref EADC_TIMER0_TRIGGER
67 * - \ref EADC_TIMER1_TRIGGER
68 * - \ref EADC_TIMER2_TRIGGER
69 * - \ref EADC_TIMER3_TRIGGER
70 * - \ref EADC_EPWM0TG0_TRIGGER
71 * - \ref EADC_EPWM0TG1_TRIGGER
72 * - \ref EADC_EPWM0TG2_TRIGGER
73 * - \ref EADC_EPWM0TG3_TRIGGER
74 * - \ref EADC_EPWM0TG4_TRIGGER
75 * - \ref EADC_EPWM0TG5_TRIGGER
76 * - \ref EADC_EPWM1TG0_TRIGGER
77 * - \ref EADC_EPWM1TG1_TRIGGER
78 * - \ref EADC_EPWM1TG2_TRIGGER
79 * - \ref EADC_EPWM1TG3_TRIGGER
80 * - \ref EADC_EPWM1TG4_TRIGGER
81 * - \ref EADC_EPWM1TG5_TRIGGER
82 * - \ref EADC_PWM0TG0_TRIGGER
83 * - \ref EADC_PWM0TG1_TRIGGER
84 * - \ref EADC_PWM0TG2_TRIGGER
85 * - \ref EADC_PWM0TG3_TRIGGER
86 * - \ref EADC_PWM0TG4_TRIGGER
87 * - \ref EADC_PWM0TG5_TRIGGER
88 * - \ref EADC_PWM1TG0_TRIGGER
89 * - \ref EADC_PWM1TG1_TRIGGER
90 * - \ref EADC_PWM1TG2_TRIGGER
91 * - \ref EADC_PWM1TG3_TRIGGER
92 * - \ref EADC_PWM1TG4_TRIGGER
93 * - \ref EADC_PWM1TG5_TRIGGER
94 * - \ref EADC_ACMP0_TRIGGER
95 * - \ref EADC_ACMP1_TRIGGER
96 * - \ref EADC_ACMP2_TRIGGER
97 * @param[in] u32Channel Specifies the sample module channel, valid value are from 0 to 30.
98 * @return None
99 * @details Each of EADC control logic modules 0~26 which is configurable for EADC converter channel EADC_CH0~26 and trigger source.
100 * sample module 27~30 is fixed for EADC channel 27, 28, 29, 30 input sources as AVdd/4, band-gap voltage, temperature sensor, and battery power/4.
101 */
EADC_ConfigSampleModule(EADC_T * eadc,uint32_t u32ModuleNum,uint32_t u32TriggerSrc,uint32_t u32Channel)102 void EADC_ConfigSampleModule(EADC_T *eadc, \
103 uint32_t u32ModuleNum, \
104 uint32_t u32TriggerSrc, \
105 uint32_t u32Channel)
106 {
107 if (u32ModuleNum < 19)
108 {
109 eadc->SCTL[u32ModuleNum] &= ~(EADC_SCTL_EXTFEN_Msk | EADC_SCTL_EXTREN_Msk | EADC_SCTL_TRGSEL_Msk | EADC_SCTL_CHSEL_Msk);
110 eadc->SCTL[u32ModuleNum] |= (u32TriggerSrc | u32Channel);
111 }
112 else
113 {
114 eadc->SCTL19[u32ModuleNum-19] &= ~(EADC_SCTL_EXTFEN_Msk | EADC_SCTL_EXTREN_Msk | EADC_SCTL_TRGSEL_Msk | EADC_SCTL_CHSEL_Msk);
115 eadc->SCTL19[u32ModuleNum-19] |= (u32TriggerSrc | u32Channel);
116 }
117 }
118
119
120 /**
121 * @brief Set trigger delay time.
122 * @param[in] eadc The pointer of the specified EADC module.
123 * @param[in] u32ModuleNum Decides the sample module number, valid value are from 0 to 26.
124 * @param[in] u32TriggerDelayTime Decides the trigger delay time, valid range are between 0~0xFF.
125 * @param[in] u32DelayClockDivider Decides the trigger delay clock divider. Valid values are:
126 * - \ref EADC_SCTL_TRGDLYDIV_DIVIDER_1 : Trigger delay clock frequency is ADC_CLK/1
127 * - \ref EADC_SCTL_TRGDLYDIV_DIVIDER_2 : Trigger delay clock frequency is ADC_CLK/2
128 * - \ref EADC_SCTL_TRGDLYDIV_DIVIDER_4 : Trigger delay clock frequency is ADC_CLK/4
129 * - \ref EADC_SCTL_TRGDLYDIV_DIVIDER_16 : Trigger delay clock frequency is ADC_CLK/16
130 * @return None
131 * @details User can configure the trigger delay time by setting TRGDLYCNT and TRGDLYDIV.
132 * Trigger delay time = (u32TriggerDelayTime) x Trigger delay clock period.
133 */
EADC_SetTriggerDelayTime(EADC_T * eadc,uint32_t u32ModuleNum,uint32_t u32TriggerDelayTime,uint32_t u32DelayClockDivider)134 void EADC_SetTriggerDelayTime(EADC_T *eadc, \
135 uint32_t u32ModuleNum, \
136 uint32_t u32TriggerDelayTime, \
137 uint32_t u32DelayClockDivider)
138 {
139 if (u32ModuleNum < 19)
140 {
141 eadc->SCTL[u32ModuleNum] &= ~(EADC_SCTL_TRGDLYDIV_Msk | EADC_SCTL_TRGDLYCNT_Msk);
142 eadc->SCTL[u32ModuleNum] |= ((u32TriggerDelayTime << EADC_SCTL_TRGDLYCNT_Pos) | u32DelayClockDivider);
143 }
144 else
145 {
146 eadc->SCTL19[u32ModuleNum-19] &= ~(EADC_SCTL_TRGDLYDIV_Msk | EADC_SCTL_TRGDLYCNT_Msk);
147 eadc->SCTL19[u32ModuleNum-19] |= ((u32TriggerDelayTime << EADC_SCTL_TRGDLYCNT_Pos) | u32DelayClockDivider);
148 }
149 }
150
151 /**
152 * @brief Set EADC extend sample time.
153 * @param[in] eadc The pointer of the specified EADC module.
154 * @param[in] u32ModuleNum Decides the sample module number, valid value are from 0 to 30.
155 * @param[in] u32ExtendSampleTime Decides the extend sampling time, the range is from 0~255 EADC clock. Valid value are from 0 to 0xFF.
156 * @return None
157 * @details When A/D converting at high conversion rate, the sampling time of analog input voltage may not enough if input channel loading is heavy,
158 * user can extend A/D sampling time after trigger source is coming to get enough sampling time.
159 */
EADC_SetExtendSampleTime(EADC_T * eadc,uint32_t u32ModuleNum,uint32_t u32ExtendSampleTime)160 void EADC_SetExtendSampleTime(EADC_T *eadc, uint32_t u32ModuleNum, uint32_t u32ExtendSampleTime)
161 {
162 if (u32ModuleNum < 19)
163 {
164 eadc->SCTL[u32ModuleNum] &= ~EADC_SCTL_EXTSMPT_Msk;
165 eadc->SCTL[u32ModuleNum] |= (u32ExtendSampleTime << EADC_SCTL_EXTSMPT_Pos);
166 }
167 else
168 {
169 eadc->SCTL19[u32ModuleNum-19] &= ~EADC_SCTL_EXTSMPT_Msk;
170 eadc->SCTL19[u32ModuleNum-19] |= (u32ExtendSampleTime << EADC_SCTL_EXTSMPT_Pos);
171 }
172 }
173
174
175 /*@}*/ /* end of group EADC_EXPORTED_FUNCTIONS */
176
177 /*@}*/ /* end of group EADC_Driver */
178
179 /*@}*/ /* end of group Standard_Driver */
180
181 /*** (C) COPYRIGHT 2023 Nuvoton Technology Corp. ***/
182
