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Searched refs:inpw (Results 1 – 13 of 13) sorted by relevance

/hal_nuvoton-latest/m2l31x/StdDriver/src/
Deadc.c37 outpw(EADC0_BASE+0xFF4, inpw(EADC0_BASE+0xFF4) | BIT1); in EADC_Open()
Dclk.c1334 u32tmpVal = inpw((uint32_t *)u32tmpAddr); in CLK_EnableSPDWKPin()
Drtc.c881 uint32_t u32TrimDefault = inpw(SYS_BASE + 0x14Cul); in RTC_SetClockSource()
/hal_nuvoton-latest/m46x/Devices/M460/Source/
Dsystem_M460.c85 outpw(0x40000014, inpw(0x40000014)|BIT7); in SystemInit()
/hal_nuvoton-latest/m46x/StdDriver/src/
Dclk.c1389 u32tmpVal = inpw((uint32_t *)u32tmpAddr); in CLK_EnableSPDWKPin()
1537 …u32TmpVal = ((inpw((uint32_t *)u32TmpAddr) & (MODULE_CLKSEL_Msk(u32ModuleIdx) << MODULE_CLKSEL_Pos… in CLK_GetModuleClockSource()
1606 …u32DivVal = ((inpw((uint32_t *)u32DivAddr) & (MODULE_CLKDIV_Msk(u32ModuleIdx) << MODULE_CLKDIV_Pos… in CLK_GetModuleClockDivider()
Drtc.c1052 uint32_t u32TrimDefault = inpw(SYS_BASE + 0x14Cul); in RTC_SetClockSource()
Dcanfd.c192 u32ReadReg = inpw(pu32RegAddr); in CANFD_ReadReg()
Dcrypto.c378 u32Digest[i] = inpw(reg_addr); in SHA_Read()
/hal_nuvoton-latest/m48x/Devices/M480/Include/
DM480.h509 #define inpw(port) (*((volatile unsigned int *)(port))) macro
/hal_nuvoton-latest/m2l31x/Devices/M2L31/Include/
DM2L31.h624 #define inpw(port) ((*((volatile unsigned int *)(port)))) macro
/hal_nuvoton-latest/m46x/Devices/M460/Include/
Dm460.h607 #define inpw(port) (*((volatile unsigned int *)(port))) macro
/hal_nuvoton-latest/m48x/StdDriver/src/
Dclk.c1176 u32tmpVal = inpw((uint32_t *)u32tmpAddr); in CLK_EnableSPDWKPin()
Dcrypto.c453 u32Digest[i] = inpw(reg_addr); in SHA_Read()