Searched refs:SPI_FIFO_TXTH_INT_MASK (Results 1 – 6 of 6) sorted by relevance
665 if((u32Mask & SPI_FIFO_TXTH_INT_MASK) == SPI_FIFO_TXTH_INT_MASK) in SPI_EnableInt()748 if((u32Mask & SPI_FIFO_TXTH_INT_MASK) == SPI_FIFO_TXTH_INT_MASK) in SPI_DisableInt()840 if((u32Mask & SPI_FIFO_TXTH_INT_MASK) && (u32TmpVal)) in SPI_GetIntFlag()842 u32IntFlag |= SPI_FIFO_TXTH_INT_MASK; in SPI_GetIntFlag()
666 if((u32Mask & SPI_FIFO_TXTH_INT_MASK) == SPI_FIFO_TXTH_INT_MASK) in SPI_EnableInt()749 if((u32Mask & SPI_FIFO_TXTH_INT_MASK) == SPI_FIFO_TXTH_INT_MASK) in SPI_DisableInt()841 if((u32Mask & SPI_FIFO_TXTH_INT_MASK) && (u32TmpVal)) in SPI_GetIntFlag()843 u32IntFlag |= SPI_FIFO_TXTH_INT_MASK; in SPI_GetIntFlag()
1276 if((u32Mask & SPI_FIFO_TXTH_INT_MASK) == SPI_FIFO_TXTH_INT_MASK) in SPI_EnableInt()1359 if((u32Mask & SPI_FIFO_TXTH_INT_MASK) == SPI_FIFO_TXTH_INT_MASK) in SPI_DisableInt()1451 if((u32Mask & SPI_FIFO_TXTH_INT_MASK) && (u32TmpVal)) in SPI_GetIntFlag()1453 u32IntFlag |= SPI_FIFO_TXTH_INT_MASK; in SPI_GetIntFlag()
49 #define SPI_FIFO_TXTH_INT_MASK (0x080U) /*!< FIFO TX threshold i… macro